# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/N1, RZ/N2H and RZ/T2H MII converter

maintainers:
  - Clément Léger <clement.leger@bootlin.com>
  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

description: |
  This MII converter is present on the Renesas RZ/N1, RZ/N2H and RZ/T2H SoC
  families. It is responsible to do MII passthrough or convert it to RMII/RGMII.

properties:
  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,r9a06g032-miic
          - const: renesas,rzn1-miic
      - items:
          - const: renesas,r9a09g077-miic # RZ/T2H
      - items:
          - const: renesas,r9a09g087-miic # RZ/N2H
          - const: renesas,r9a09g077-miic

  reg:
    maxItems: 1

  clocks:
    items:
      - description: MII reference clock
      - description: RGMII reference clock
      - description: RMII reference clock
      - description: AHB clock used for the MII converter register interface

  clock-names:
    items:
      - const: mii_ref
      - const: rgmii_ref
      - const: rmii_ref
      - const: hclk

  resets:
    items:
      - description: Converter register reset
      - description: Converter reset

  reset-names:
    items:
      - const: rst
      - const: crst

  renesas,miic-switch-portin:
    description: MII Switch PORTIN configuration. This value should use one of
      the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC and
      include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1, 2]

  power-domains:
    maxItems: 1

patternProperties:
  "^mii-conv@[0-5]$":
    type: object
    description: MII converter port

    properties:
      reg:
        description: MII Converter port number.
        enum: [0, 1, 2, 3, 4, 5]

      renesas,miic-input:
        description: Converter input port configuration. This value should use
          one of the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC
          and include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs.
        $ref: /schemas/types.yaml#/definitions/uint32

      renesas,miic-phy-link-active-low:
        type: boolean
        description: Indicates that the PHY-link signal provided by the Ethernet switch,
          EtherCAT, or SERCOS3 interface is active low. When present, this property
          sets the corresponding signal polarity to active low. When omitted, the signal
          defaults to active high.

    required:
      - reg
      - renesas,miic-input

    additionalProperties: false

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: renesas,rzn1-miic
    then:
      properties:
        renesas,miic-switch-portin:
          enum: [1, 2]
        resets: false
        reset-names: false
      patternProperties:
        "^mii-conv@[0-5]$":
          properties:
            reg:
              enum: [1, 2, 3, 4, 5]
          allOf:
            - if:
                properties:
                  reg:
                    const: 1
              then:
                properties:
                  renesas,miic-input:
                    const: 0
            - if:
                properties:
                  reg:
                    const: 2
              then:
                properties:
                  renesas,miic-input:
                    enum: [1, 11]
            - if:
                properties:
                  reg:
                    const: 3
              then:
                properties:
                  renesas,miic-input:
                    enum: [7, 10]
            - if:
                properties:
                  reg:
                    const: 4
              then:
                properties:
                  renesas,miic-input:
                    enum: [4, 6, 9, 13]
            - if:
                properties:
                  reg:
                    const: 5
              then:
                properties:
                  renesas,miic-input:
                    enum: [3, 5, 8, 12]
    else:
      properties:
        renesas,miic-switch-portin:
          const: 0
      required:
        - resets
        - reset-names
      patternProperties:
        "^mii-conv@[0-5]$":
          properties:
            reg:
              enum: [0, 1, 2, 3]
          allOf:
            - if:
                properties:
                  reg:
                    const: 0
              then:
                properties:
                  renesas,miic-input:
                    enum: [0, 3, 6]
            - if:
                properties:
                  reg:
                    const: 1
              then:
                properties:
                  renesas,miic-input:
                    enum: [1, 4, 7]
            - if:
                properties:
                  reg:
                    const: 2
              then:
                properties:
                  renesas,miic-input:
                    enum: [2, 5, 8]
            - if:
                properties:
                  reg:
                    const: 3
              then:
                properties:
                  renesas,miic-input:
                    const: 1

required:
  - '#address-cells'
  - '#size-cells'
  - compatible
  - reg
  - clocks
  - clock-names
  - power-domains

additionalProperties: false

examples:
  - |
    #include <dt-bindings/net/pcs-rzn1-miic.h>
    #include <dt-bindings/clock/r9a06g032-sysctrl.h>

    eth-miic@44030000 {
      #address-cells = <1>;
      #size-cells = <0>;
      compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
      reg = <0x44030000 0x10000>;
      clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
              <&sysctrl R9A06G032_CLK_RGMII_REF>,
              <&sysctrl R9A06G032_CLK_RMII_REF>,
              <&sysctrl R9A06G032_HCLK_SWITCH_RG>;
      clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
      renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
      power-domains = <&sysctrl>;

      mii_conv1: mii-conv@1 {
        renesas,miic-input = <MIIC_GMAC1_PORT>;
        reg = <1>;
      };

      mii_conv2: mii-conv@2 {
        renesas,miic-input = <MIIC_SWITCH_PORTD>;
        reg = <2>;
      };

      mii_conv3: mii-conv@3 {
        renesas,miic-input = <MIIC_SWITCH_PORTC>;
        reg = <3>;
      };

      mii_conv4: mii-conv@4 {
        renesas,miic-input = <MIIC_SWITCH_PORTB>;
        reg = <4>;
      };

      mii_conv5: mii-conv@5 {
        renesas,miic-input = <MIIC_SWITCH_PORTA>;
        reg = <5>;
      };
    };