// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2023 Gateworks Corporation */ #include #include #include / { led-controller { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; led-0 { function = LED_FUNCTION_STATUS; color = ; gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>; default-state = "on"; linux,default-trigger = "heartbeat"; }; led-1 { function = LED_FUNCTION_STATUS; color = ; gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>; default-state = "off"; }; }; pcie0_refclk: clock-pcie0 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <100000000>; }; pps { compatible = "pps-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pps>; gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; status = "okay"; }; reg_usb2_vbus: regulator-usb2-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_usb2_en>; regulator-name = "usb2_vbus"; gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; regulator-name = "SD2_3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; /* off-board header */ &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi2>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; status = "okay"; }; &gpio1 { gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "", "gpioa", "gpiob", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; }; &gpio4 { gpio-line-names = "", "", "", "pci_usb_sel", "", "", "", "pci_wdis#", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; }; &gpio5 { gpio-line-names = "", "", "", "", "gpioc", "gpiod", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; }; &i2c2 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; accelerometer@19 { compatible = "st,lis2de12"; reg = <0x19>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_accel>; interrupt-parent = <&gpio5>; interrupts = <8 IRQ_TYPE_LEVEL_LOW>; st,drdy-int-pin = <1>; }; eeprom@52 { compatible = "atmel,24c32"; reg = <0x52>; pagesize = <32>; }; }; /* off-board header */ &i2c3 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; }; &pcie_phy { fsl,refclk-pad-mode = ; fsl,clkreq-unsupported; clocks = <&pcie0_refclk>; clock-names = "ref"; status = "okay"; }; &pcie0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie0>; reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>; status = "okay"; }; /* GPS */ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; /* USB1 - Type C front panel SINK port J14 */ &usbotg1 { dr_mode = "peripheral"; status = "okay"; }; /* USB2 4-port USB3.0 HUB: * P1 - USBC connector (host only) * P2 - USB2 test connector * P3 - miniPCIe full card * P4 - miniPCIe half card */ &usbotg2 { dr_mode = "host"; vbus-supply = <®_usb2_vbus>; status = "okay"; }; /* microSD */ &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; status = "okay"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; pinctrl_hog: hoggrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000040 /* GPIOA */ MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x40000040 /* GPIOB */ MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000106 /* PCI_USBSEL */ MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000106 /* PCIE_WDIS# */ MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000040 /* GPIOD */ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */ >; }; pinctrl_accel: accelgrp { fsl,pins = < MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x159 >; }; pinctrl_gpio_leds: gpioledgrp { fsl,pins = < MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */ MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x6 /* LEDR */ >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2 >; }; pinctrl_pcie0: pciegrp { fsl,pins = < MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x106 >; }; pinctrl_pps: ppsgrp { fsl,pins = < MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x106 >; }; pinctrl_reg_usb2_en: regusb2grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x6 /* USBHUB_RST# (ext p/u) */ >; }; pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40 >; }; pinctrl_spi2: spi2grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x140 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x140 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x140 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0 >; }; pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0 >; }; pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0 >; }; pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins = < MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 >; }; };