// SPDX-License-Identifier: GPL-2.0+ OR MIT /* * Copyright (C) 2022 Kontron Electronics GmbH */ /dts-v1/; #include "imx8mp-kontron-osm-s.dtsi" / { model = "Kontron BL i.MX8MP OSM-S"; compatible = "kontron,imx8mp-bl-osm-s", "kontron,imx8mp-osm-s", "fsl,imx8mp"; aliases { ethernet0 = &fec; ethernet1 = &eqos; }; extcon_usbc: usbc { compatible = "linux,extcon-usb-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1_id>; id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; leds { compatible = "gpio-leds"; led1 { label = "led1"; gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; pwm-beeper { compatible = "pwm-beeper"; pwms = <&pwm2 0 5000 0>; }; reg_vcc_panel: regulator-vcc-panel { compatible = "regulator-fixed"; gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "VCC_PANEL"; }; }; &ecspi2 { status = "okay"; eeram@0 { compatible = "microchip,48l640"; reg = <0>; spi-max-frequency = <20000000>; }; }; &eqos { /* Second ethernet (OSM-S ETH_B) */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos_rgmii>; phy-mode = "rgmii-id"; phy-handle = <ðphy1>; status = "okay"; mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; ethphy1: ethernet-phy@1 { compatible = "ethernet-phy-id4f51.e91b"; reg = <1>; pinctrl-0 = <&pinctrl_ethphy1>; pinctrl-names = "default"; reset-assert-us = <10000>; reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; }; }; }; &fec { /* First ethernet (OSM-S ETH_A) */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_rgmii>; phy-connection-type = "rgmii-id"; phy-handle = <ðphy0>; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@1 { compatible = "ethernet-phy-id4f51.e91b"; reg = <1>; pinctrl-0 = <&pinctrl_ethphy0>; pinctrl-names = "default"; reset-assert-us = <10000>; reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; }; }; }; &flexcan1 { status = "okay"; }; /* * Rename SoM signals according to board usage: * SDIO_A_PWR_EN -> CAN_ADDR2 * SDIO_A_WP -> CAN_ADDR3 */ &gpio2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio2>; gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "SDIO_A_CD", "SDIO_A_CLK", "SDIO_A_CMD", "SDIO_A_D0", "SDIO_A_D1", "SDIO_A_D2", "SDIO_A_D3", "CAN_ADDR2", "CAN_ADDR3"; }; /* * Rename SoM signals according to board usage: * SPI_A_WP -> CAN_ADDR0 * SPI_A_HOLD -> CAN_ADDR1 * GPIO_B_0 -> DIO1_OUT * GPIO_B_1 -> DIO2_OUT */ &gpio3 { gpio-line-names = "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_A_PERST", "SDIO_B_D5", "SDIO_B_D6", "SDIO_B_D7", "CAN_ADDR0", "CAN_ADDR1", "UART_B_RTS", "UART_B_CTS", "SDIO_B_D0", "SDIO_B_D1", "SDIO_B_D2", "SDIO_B_D3", "SDIO_B_WP", "SDIO_B_D4", "PCIE_SM_ALERT", "SDIO_B_CLK", "SDIO_B_CMD", "DIO1_OUT", "DIO2_OUT", "", "BOOT_SEL0", "BOOT_SEL1", "", "", "SDIO_B_CD", "SDIO_B_PWR_EN", "HDMI_CEC", "HDMI_HPD"; }; /* * Rename SoM signals according to board usage: * GPIO_B_5 -> DIO2_IN * GPIO_B_6 -> DIO3_IN * GPIO_B_7 -> DIO4_IN * GPIO_B_3 -> DIO4_OUT * GPIO_B_4 -> DIO1_IN * GPIO_B_2 -> DIO3_OUT */ &gpio4 { gpio-line-names = "DIO2_IN", "DIO3_IN", "DIO4_IN", "GPIO_C_0", "ETH_A_MDC", "ETH_A_MDIO", "ETH_A_RXD0", "ETH_A_RXD1", "ETH_A_RXD2", "ETH_A_RXD3", "ETH_A_RX_DV", "ETH_A_RX_CLK", "ETH_A_TXD0", "ETH_A_TXD1", "ETH_A_TXD2", "ETH_A_TXD3", "ETH_A_TX_EN", "ETH_A_TX_CLK", "DIO4_OUT", "DIO1_IN", "DIO3_OUT", "GPIO_A_6", "CAN_A_TX", "UART_A_CTS", "UART_A_RTS", "CAN_A_RX", "CAN_B_TX", "CAN_B_RX", "GPIO_A_7", "CARRIER_PWR_EN", "I2S_A_DATA_IN", "I2S_LRCLK"; }; &hdmi_pvi { status = "okay"; }; &hdmi_tx { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hdmi>; ddc-i2c-bus = <&i2c2>; status = "okay"; }; &hdmi_tx_phy { status = "okay"; }; &i2c1 { status = "okay"; gpio_expander_dio: io-expander@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; gpio-line-names = "DIO1_OUT","DIO1_IN", "DIO2_OUT","DIO2_IN", "DIO3_OUT","DIO3_IN", "DIO4_OUT","DIO4_IN"; interrupt-parent = <&gpio3>; interrupts = <19 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; }; }; &i2c2 { status = "okay"; }; &i2c4 { status = "okay"; }; &lcdif3 { status = "okay"; }; &pwm2 { status = "okay"; }; ®_usdhc2_vcc { status = "disabled"; }; &snvs_pwrkey { status = "okay"; }; &uart1 { uart-has-rtscts; status = "okay"; }; &uart4 { linux,rs485-enabled-at-boot-time; uart-has-rtscts; status = "okay"; }; &usb_dwc3_0 { adp-disable; hnp-disable; srp-disable; dr_mode = "otg"; extcon = <&extcon_usbc>; usb-role-switch; status = "okay"; }; &usb_dwc3_1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_hub>; #address-cells = <1>; #size-cells = <0>; dr_mode = "host"; status = "okay"; usb-hub@1 { compatible = "usb424,2514"; reg = <1>; reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; }; }; &usb3_0 { status = "okay"; }; &usb3_1 { fsl,disable-port-power-control; fsl,permanently-attached; status = "okay"; }; &usb3_phy0 { vbus-supply = <®_usb1_vbus>; status = "okay"; }; &usb3_phy1 { status = "okay"; }; &usdhc2 { pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; vmmc-supply = <®_vdd_3v3>; status = "okay"; }; &iomuxc { pinctrl_ethphy0: ethphy0grp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x46 >; }; pinctrl_ethphy1: ethphy1grp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x46 >; }; pinctrl_gpio2: gpio2grp { fsl,pins = < MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x46 MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x46 >; }; pinctrl_usb_hub: usbhubgrp { fsl,pins = < MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x46 >; }; };