// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2022 NXP
 */

/dts-v1/;

#include <dt-bindings/usb/pd.h>
#include "imx93.dtsi"

/ {
	model = "NXP i.MX93 11X11 EVK board";
	compatible = "fsl,imx93-11x11-evk", "fsl,imx93";

	chosen {
		stdout-path = &lpuart1;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			alloc-ranges = <0 0x80000000 0 0x40000000>;
			size = <0 0x10000000>;
			linux,cma-default;
		};

		vdev0vring0: vdev0vring0@a4000000 {
			reg = <0 0xa4000000 0 0x8000>;
			no-map;
		};

		vdev0vring1: vdev0vring1@a4008000 {
			reg = <0 0xa4008000 0 0x8000>;
			no-map;
		};

		vdev1vring0: vdev1vring0@a4010000 {
			reg = <0 0xa4010000 0 0x8000>;
			no-map;
		};

		vdev1vring1: vdev1vring1@a4018000 {
			reg = <0 0xa4018000 0 0x8000>;
			no-map;
		};

		rsc_table: rsc-table@2021e000 {
			reg = <0 0x2021e000 0 0x1000>;
			no-map;
		};

		vdevbuffer: vdevbuffer@a4020000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa4020000 0 0x100000>;
			no-map;
		};

	};

	reg_vdd_12v: regulator-vdd-12v {
		compatible = "regulator-fixed";
		regulator-name = "VDD_12V";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		gpio = <&pcal6524 14 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_vref_1v8: regulator-adc-vref {
		compatible = "regulator-fixed";
		regulator-name = "vref_1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_audio_pwr: regulator-audio-pwr {
		compatible = "regulator-fixed";
		regulator-name = "audio-pwr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&adp5585 1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_can2_standby: regulator-can2-standby {
		compatible = "regulator-fixed";
		regulator-name = "can2-stby";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&adp5585 6 GPIO_ACTIVE_LOW>;
	};

	reg_usdhc2_vmmc: regulator-usdhc2 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
		regulator-name = "VSD_3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
		off-on-delay-us = <12000>;
		enable-active-high;
	};

	backlight_lvds: backlight-lvds {
		compatible = "pwm-backlight";
		pwms = <&adp5585 0 100000 0>;
		brightness-levels = <0 100>;
		num-interpolated-steps = <100>;
		default-brightness-level = <100>;
		power-supply = <&reg_vdd_12v>;
		enable-gpios = <&adp5585 9 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};

	bt_sco_codec: bt-sco-codec {
		compatible = "linux,bt-sco";
		#sound-dai-cells = <1>;
	};

	sound-bt-sco {
		compatible = "simple-audio-card";
		simple-audio-card,name = "bt-sco-audio";
		simple-audio-card,format = "dsp_a";
		simple-audio-card,bitclock-inversion;
		simple-audio-card,frame-master = <&btcpu>;
		simple-audio-card,bitclock-master = <&btcpu>;

		btcpu: simple-audio-card,cpu {
			sound-dai = <&sai1>;
			dai-tdm-slot-num = <2>;
			dai-tdm-slot-width = <16>;
		};

		simple-audio-card,codec {
			sound-dai = <&bt_sco_codec 1>;
		};
	};

	sound-micfil {
		compatible = "fsl,imx-audio-card";
		model = "micfil-audio";

		pri-dai-link {
			link-name = "micfil hifi";
			format = "i2s";

			cpu {
				sound-dai = <&micfil>;
			};
		};
	};

	sound-wm8962 {
		compatible = "fsl,imx-audio-wm8962";
		model = "wm8962-audio";
		audio-cpu = <&sai3>;
		audio-codec = <&wm8962>;
		hp-det-gpio = <&pcal6524 4 GPIO_ACTIVE_HIGH>;
		audio-routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"Ext Spk", "SPKOUTL",
			"Ext Spk", "SPKOUTR",
			"AMIC", "MICBIAS",
			"IN3R", "AMIC",
			"IN1R", "AMIC";
	};

	sound-xcvr {
		compatible = "fsl,imx-audio-card";
		model = "imx-audio-xcvr";

		pri-dai-link {
			link-name = "XCVR PCM";

			cpu {
				sound-dai = <&xcvr>;
			};
		};
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&cm33 {
	mbox-names = "tx", "rx", "rxdb";
	mboxes = <&mu1 0 1>,
		 <&mu1 1 1>,
		 <&mu1 3 1>;
	memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
			<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
	status = "okay";
};

&eqos {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_eqos>;
	pinctrl-1 = <&pinctrl_eqos_sleep>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy1>;
	status = "okay";

	mdio {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
		#size-cells = <0>;
		clock-frequency = <5000000>;

		ethphy1: ethernet-phy@1 {
			reg = <1>;
			eee-broken-1000t;
			reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
			reset-deassert-us = <80000>;
		};
	};
};

&fec {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_fec>;
	pinctrl-1 = <&pinctrl_fec_sleep>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy2>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		clock-frequency = <5000000>;

		ethphy2: ethernet-phy@2 {
			reg = <2>;
			eee-broken-1000t;
			reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
			reset-deassert-us = <80000>;
		};
	};
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_can2_standby>;
	status = "okay";
};

&lpi2c1 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c1>;
	status = "okay";

	wm8962: codec@1a {
		compatible = "wlf,wm8962";
		reg = <0x1a>;
		clocks = <&clk IMX93_CLK_SAI3_GATE>;
		DCVDD-supply = <&reg_audio_pwr>;
		DBVDD-supply = <&reg_audio_pwr>;
		AVDD-supply = <&reg_audio_pwr>;
		CPVDD-supply = <&reg_audio_pwr>;
		MICVDD-supply = <&reg_audio_pwr>;
		PLLVDD-supply = <&reg_audio_pwr>;
		SPKVDD1-supply = <&reg_audio_pwr>;
		SPKVDD2-supply = <&reg_audio_pwr>;
		gpio-cfg = <
			0x0000 /* 0:Default */
			0x0000 /* 1:Default */
			0x0000 /* 2:FN_DMICCLK */
			0x0000 /* 3:Default */
			0x0000 /* 4:FN_DMICCDAT */
			0x0000 /* 5:Default */
		>;
	};

	inertial-meter@6a {
		compatible = "st,lsm6dso";
		reg = <0x6a>;
	};
};

&lpi2c2 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c2>;
	status = "okay";

	pcal6524: gpio@22 {
		compatible = "nxp,pcal6524";
		reg = <0x22>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pcal6524>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		interrupt-parent = <&gpio3>;
		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
	};

	pmic@25 {
		compatible = "nxp,pca9451a";
		reg = <0x25>;
		interrupt-parent = <&pcal6524>;
		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;

		regulators {
			buck1: BUCK1 {
				regulator-name = "BUCK1";
				regulator-min-microvolt = <610000>;
				regulator-max-microvolt = <950000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <3125>;
			};

			buck2: BUCK2 {
				regulator-name = "BUCK2";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <670000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <3125>;
			};

			buck4: BUCK4 {
				regulator-name = "BUCK4";
				regulator-min-microvolt = <1620000>;
				regulator-max-microvolt = <3400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck5: BUCK5 {
				regulator-name = "BUCK5";
				regulator-min-microvolt = <1620000>;
				regulator-max-microvolt = <3400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck6: BUCK6 {
				regulator-name = "BUCK6";
				regulator-min-microvolt = <1060000>;
				regulator-max-microvolt = <1140000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1: LDO1 {
				regulator-name = "LDO1";
				regulator-min-microvolt = <1620000>;
				regulator-max-microvolt = <1980000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4: LDO4 {
				regulator-name = "LDO4";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <840000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo5: LDO5 {
				regulator-name = "LDO5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};

	adp5585: io-expander@34 {
		compatible = "adi,adp5585-00", "adi,adp5585";
		reg = <0x34>;
		vdd-supply = <&buck4>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-reserved-ranges = <5 1>;
		#pwm-cells = <3>;
	};
};

&lpi2c3 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c3>;
	status = "okay";

	adp5585_isp: io-expander@34 {
		compatible = "adi,adp5585-01", "adi,adp5585";
		reg = <0x34>;
		gpio-controller;
		#gpio-cells = <2>;
		#pwm-cells = <3>;
	};

	ptn5110: tcpc@50 {
		compatible = "nxp,ptn5110", "tcpci";
		reg = <0x50>;
		interrupt-parent = <&gpio3>;
		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;

		typec1_con: connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			power-role = "dual";
			data-role = "dual";
			try-power-role = "sink";
			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
				     PDO_VAR(5000, 20000, 3000)>;
			op-sink-microwatt = <15000000>;
			self-powered;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;

					typec1_dr_sw: endpoint {
						remote-endpoint = <&usb1_drd_sw>;
					};
				};
			};
		};
	};

	ptn5110_2: tcpc@51 {
		compatible = "nxp,ptn5110", "tcpci";
		reg = <0x51>;
		interrupt-parent = <&gpio3>;
		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;

		typec2_con: connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			power-role = "dual";
			data-role = "dual";
			try-power-role = "sink";
			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
				     PDO_VAR(5000, 20000, 3000)>;
			op-sink-microwatt = <15000000>;
			self-powered;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;

					typec2_dr_sw: endpoint {
						remote-endpoint = <&usb2_drd_sw>;
					};
				};
			};
		};
	};

	pcf2131: rtc@53 {
		compatible = "nxp,pcf2131";
		reg = <0x53>;
		interrupt-parent = <&pcal6524>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
	};
};

&lpuart1 { /* console */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&lpuart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&micfil {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_pdm>;
	pinctrl-1 = <&pinctrl_pdm_sleep>;
	assigned-clocks = <&clk IMX93_CLK_PDM>;
	assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
	assigned-clock-rates = <49152000>;
	status = "okay";
};

&mu1 {
	status = "okay";
};

&mu2 {
	status = "okay";
};

&sai1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_sai1>;
	pinctrl-1 = <&pinctrl_sai1_sleep>;
	assigned-clocks = <&clk IMX93_CLK_SAI1>;
	assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
	assigned-clock-rates = <12288000>;
	fsl,sai-mclk-direction-output;
	status = "okay";
};

&sai3 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_sai3>;
	pinctrl-1 = <&pinctrl_sai3_sleep>;
	assigned-clocks = <&clk IMX93_CLK_SAI3>;
	assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
	assigned-clock-rates = <12288000>;
	fsl,sai-mclk-direction-output;
	status = "okay";
};

&usbotg1 {
	dr_mode = "otg";
	hnp-disable;
	srp-disable;
	adp-disable;
	usb-role-switch;
	disable-over-current;
	samsung,picophy-pre-emp-curr-control = <3>;
	samsung,picophy-dc-vol-level-adjust = <7>;
	status = "okay";

	port {
		usb1_drd_sw: endpoint {
			remote-endpoint = <&typec1_dr_sw>;
		};
	};
};

&usbotg2 {
	dr_mode = "otg";
	hnp-disable;
	srp-disable;
	adp-disable;
	usb-role-switch;
	disable-over-current;
	samsung,picophy-pre-emp-curr-control = <3>;
	samsung,picophy-dc-vol-level-adjust = <7>;
	status = "okay";

	port {
		usb2_drd_sw: endpoint {
			remote-endpoint = <&typec2_dr_sw>;
		};
	};
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
	cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	bus-width = <4>;
	status = "okay";
	no-mmc;
};

&wdog3 {
	status = "okay";
};

&xcvr {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&pinctrl_spdif>;
	pinctrl-1 = <&pinctrl_spdif_sleep>;
	assigned-clocks = <&clk IMX93_CLK_SPDIF>,
			 <&clk IMX93_CLK_AUDIO_XCVR>;
	assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>,
			 <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
	assigned-clock-rates = <12288000>, <200000000>;
	status = "okay";
};

&iomuxc {
	pinctrl_eqos: eqosgrp {
		fsl,pins = <
			MX93_PAD_ENET1_MDC__ENET_QOS_MDC			0x57e
			MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO			0x57e
			MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0			0x57e
			MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1			0x57e
			MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2			0x57e
			MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3			0x57e
			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x5fe
			MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x57e
			MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0			0x57e
			MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1			0x57e
			MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2			0x57e
			MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3			0x57e
			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x5fe
			MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x57e
		>;
	};

	pinctrl_eqos_sleep: eqossleepgrp {
		fsl,pins = <
			MX93_PAD_ENET1_MDC__GPIO4_IO00				0x31e
			MX93_PAD_ENET1_MDIO__GPIO4_IO01				0x31e
			MX93_PAD_ENET1_RD0__GPIO4_IO10                          0x31e
			MX93_PAD_ENET1_RD1__GPIO4_IO11				0x31e
			MX93_PAD_ENET1_RD2__GPIO4_IO12				0x31e
			MX93_PAD_ENET1_RD3__GPIO4_IO13				0x31e
			MX93_PAD_ENET1_RXC__GPIO4_IO09                          0x31e
			MX93_PAD_ENET1_RX_CTL__GPIO4_IO08			0x31e
			MX93_PAD_ENET1_TD0__GPIO4_IO05                          0x31e
			MX93_PAD_ENET1_TD1__GPIO4_IO04                          0x31e
			MX93_PAD_ENET1_TD2__GPIO4_IO03				0x31e
			MX93_PAD_ENET1_TD3__GPIO4_IO02				0x31e
			MX93_PAD_ENET1_TXC__GPIO4_IO07                          0x31e
			MX93_PAD_ENET1_TX_CTL__GPIO4_IO06                       0x31e
		>;
	};

	pinctrl_fec: fecgrp {
		fsl,pins = <
			MX93_PAD_ENET2_MDC__ENET1_MDC			0x57e
			MX93_PAD_ENET2_MDIO__ENET1_MDIO			0x57e
			MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0		0x57e
			MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1		0x57e
			MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2		0x57e
			MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3		0x57e
			MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC		0x5fe
			MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL	0x57e
			MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0		0x57e
			MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1		0x57e
			MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2		0x57e
			MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3		0x57e
			MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC		0x5fe
			MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL	0x57e
		>;
	};

	pinctrl_lpi2c3: lpi2c3grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO28__LPI2C3_SDA			0x40000b9e
			MX93_PAD_GPIO_IO29__LPI2C3_SCL			0x40000b9e
		>;
	};

	pinctrl_fec_sleep: fecsleepgrp {
		fsl,pins = <
			MX93_PAD_ENET2_MDC__GPIO4_IO14			0x51e
			MX93_PAD_ENET2_MDIO__GPIO4_IO15			0x51e
			MX93_PAD_ENET2_RD0__GPIO4_IO24			0x51e
			MX93_PAD_ENET2_RD1__GPIO4_IO25			0x51e
			MX93_PAD_ENET2_RD2__GPIO4_IO26			0x51e
			MX93_PAD_ENET2_RD3__GPIO4_IO27			0x51e
			MX93_PAD_ENET2_RXC__GPIO4_IO23                  0x51e
			MX93_PAD_ENET2_RX_CTL__GPIO4_IO22		0x51e
			MX93_PAD_ENET2_TD0__GPIO4_IO19			0x51e
			MX93_PAD_ENET2_TD1__GPIO4_IO18			0x51e
			MX93_PAD_ENET2_TD2__GPIO4_IO17			0x51e
			MX93_PAD_ENET2_TD3__GPIO4_IO16			0x51e
			MX93_PAD_ENET2_TXC__GPIO4_IO21                  0x51e
			MX93_PAD_ENET2_TX_CTL__GPIO4_IO20               0x51e
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO25__CAN2_TX	0x139e
			MX93_PAD_GPIO_IO27__CAN2_RX	0x139e
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX93_PAD_UART1_RXD__LPUART1_RX			0x31e
			MX93_PAD_UART1_TXD__LPUART1_TX			0x31e
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX		0x31e
			MX93_PAD_DAP_TDI__LPUART5_RX			0x31e
			MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B		0x31e
			MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B		0x31e
		>;
	};

	pinctrl_lpi2c1: lpi2c1grp {
		fsl,pins = <
			MX93_PAD_I2C1_SCL__LPI2C1_SCL			0x40000b9e
			MX93_PAD_I2C1_SDA__LPI2C1_SDA			0x40000b9e
		>;
	};

	pinctrl_lpi2c2: lpi2c2grp {
		fsl,pins = <
			MX93_PAD_I2C2_SCL__LPI2C2_SCL			0x40000b9e
			MX93_PAD_I2C2_SDA__LPI2C2_SDA			0x40000b9e
		>;
	};

	pinctrl_lpi2c3: lpi2c3grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO28__LPI2C3_SDA			0x40000b9e
			MX93_PAD_GPIO_IO29__LPI2C3_SCL			0x40000b9e
		>;
	};

	pinctrl_pcal6524: pcal6524grp {
		fsl,pins = <
			MX93_PAD_CCM_CLKO2__GPIO3_IO27			0x31e
		>;
	};

	pinctrl_pdm: pdmgrp {
		fsl,pins = <
			MX93_PAD_PDM_CLK__PDM_CLK			0x31e
			MX93_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM00	0x31e
			MX93_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM01	0x31e
		>;
	};

	pinctrl_pdm_sleep: pdmsleepgrp {
		fsl,pins = <
			MX93_PAD_PDM_CLK__GPIO1_IO08			0x31e
			MX93_PAD_PDM_BIT_STREAM0__GPIO1_IO09		0x31e
			MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10		0x31e
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			MX93_PAD_SAI1_TXC__SAI1_TX_BCLK			0x31e
			MX93_PAD_SAI1_TXFS__SAI1_TX_SYNC		0x31e
			MX93_PAD_SAI1_TXD0__SAI1_TX_DATA00		0x31e
			MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00		0x31e
		>;
	};

	pinctrl_sai1_sleep: sai1sleepgrp {
		fsl,pins = <
			MX93_PAD_SAI1_TXC__GPIO1_IO12                   0x51e
			MX93_PAD_SAI1_TXFS__GPIO1_IO11			0x51e
			MX93_PAD_SAI1_TXD0__GPIO1_IO13			0x51e
			MX93_PAD_SAI1_RXD0__GPIO1_IO14			0x51e
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX93_PAD_SD1_CLK__USDHC1_CLK		0x1582
			MX93_PAD_SD1_CMD__USDHC1_CMD		0x40001382
			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x40001382
			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x40001382
			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x40001382
			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x40001382
			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x40001382
			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x40001382
			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x40001382
			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x40001382
			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x1582
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
		fsl,pins = <
			MX93_PAD_SD1_CLK__USDHC1_CLK		0x158e
			MX93_PAD_SD1_CMD__USDHC1_CMD		0x4000138e
			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x4000138e
			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x4000138e
			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x4000138e
			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x4000138e
			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x4000138e
			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x4000138e
			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x4000138e
			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x4000138e
			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x158e
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
		fsl,pins = <
			MX93_PAD_SD1_CLK__USDHC1_CLK		0x15fe
			MX93_PAD_SD1_CMD__USDHC1_CMD		0x400013fe
			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x400013fe
			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x400013fe
			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x400013fe
			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x400013fe
			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x400013fe
			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x400013fe
			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x400013fe
			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x400013fe
			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x15fe
		>;
	};

	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
		fsl,pins = <
			MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e
		>;
	};

	pinctrl_sai3: sai3grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO26__SAI3_TX_SYNC                0x31e
			MX93_PAD_GPIO_IO16__SAI3_TX_BCLK                0x31e
			MX93_PAD_GPIO_IO17__SAI3_MCLK           0x31e
			MX93_PAD_GPIO_IO19__SAI3_TX_DATA00              0x31e
			MX93_PAD_GPIO_IO20__SAI3_RX_DATA00              0x31e
		>;
	};

	pinctrl_sai3_sleep: sai3sleepgrp {
		fsl,pins = <
			MX93_PAD_GPIO_IO26__GPIO2_IO26			0x51e
			MX93_PAD_GPIO_IO16__GPIO2_IO16			0x51e
			MX93_PAD_GPIO_IO17__GPIO2_IO17			0x51e
			MX93_PAD_GPIO_IO19__GPIO2_IO19			0x51e
			MX93_PAD_GPIO_IO20__GPIO2_IO20			0x51e
		>;
	};

	pinctrl_spdif: spdifgrp {
		fsl,pins = <
			MX93_PAD_GPIO_IO22__SPDIF_IN		0x31e
			MX93_PAD_GPIO_IO23__SPDIF_OUT		0x31e
		>;
	};

	pinctrl_spdif_sleep: spdifsleepgrp {
		fsl,pins = <
			MX93_PAD_GPIO_IO22__GPIO2_IO22		0x31e
			MX93_PAD_GPIO_IO23__GPIO2_IO23		0x31e
		>;
	};

	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
		fsl,pins = <
			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e
		>;
	};

	pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {
		fsl,pins = <
			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x51e
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX93_PAD_SD2_CLK__USDHC2_CLK		0x1582
			MX93_PAD_SD2_CMD__USDHC2_CMD		0x40001382
			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x40001382
			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x40001382
			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x40001382
			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x40001382
			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
		fsl,pins = <
			MX93_PAD_SD2_CLK__USDHC2_CLK		0x158e
			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000138e
			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e
			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e
			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000138e
			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000138e
			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
		>;
	};

	/* need to config the SION for data and cmd pad, refer to ERR052021 */
	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
		fsl,pins = <
			MX93_PAD_SD2_CLK__USDHC2_CLK		0x15fe
			MX93_PAD_SD2_CMD__USDHC2_CMD		0x400013fe
			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x400013fe
			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x400013fe
			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x400013fe
			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x400013fe
			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
		>;
	};

	pinctrl_usdhc2_sleep: usdhc2sleepgrp {
		fsl,pins = <
			MX93_PAD_SD2_CLK__GPIO3_IO01            0x51e
			MX93_PAD_SD2_CMD__GPIO3_IO02		0x51e
			MX93_PAD_SD2_DATA0__GPIO3_IO03		0x51e
			MX93_PAD_SD2_DATA1__GPIO3_IO04		0x51e
			MX93_PAD_SD2_DATA2__GPIO3_IO05		0x51e
			MX93_PAD_SD2_DATA3__GPIO3_IO06		0x51e
			MX93_PAD_SD2_VSELECT__GPIO3_IO19	0x51e
		>;
	};

};