// SPDX-License-Identifier: GPL-2.0-only OR MIT /* * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH * Author: Wadim Egorov * * Product homepage: * https://www.phytec.com/product/phycore-am62x */ #include #include #include / { model = "PHYTEC phyCORE-AM62x"; compatible = "phytec,am62-phycore-som", "ti,am625"; aliases { ethernet0 = &cpsw_port1; gpio0 = &main_gpio0; gpio1 = &main_gpio1; i2c0 = &main_i2c0; mmc0 = &sdhci0; rtc0 = &i2c_som_rtc; rtc1 = &wkup_rtc0; spi0 = &ospi0; }; memory@80000000 { device_type = "memory"; reg = <0x00000000 0x80000000 0x00000000 0x80000000>; }; reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; ramoops@9ca00000 { compatible = "ramoops"; reg = <0x00 0x9ca00000 0x00 0x00100000>; record-size = <0x8000>; console-size = <0x8000>; ftrace-size = <0x00>; pmsg-size = <0x8000>; }; mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cb00000 0x00 0x100000>; no-map; }; mcu_m4fss_memory_region: m4f-memory@9cc00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cc00000 0x00 0xe00000>; no-map; }; secure_tfa_ddr: tfa@9e780000 { reg = <0x00 0x9e780000 0x00 0x80000>; alignment = <0x1000>; no-map; }; secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ alignment = <0x1000>; no-map; }; wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9db00000 0x00 0x00c00000>; no-map; }; }; vcc_5v0_som: regulator-vcc-5v0-som { compatible = "regulator-fixed"; regulator-name = "VCC_5V0_SOM"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; regulator-boot-on; }; vdd_1v8: regulator-vdd-1v8 { compatible = "regulator-fixed"; regulator-name = "VDD_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&vcc_5v0_som>; regulator-always-on; regulator-boot-on; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&leds_pins_default>; led-0 { color = ; gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; function = LED_FUNCTION_HEARTBEAT; }; }; }; &main_pmx0 { leds_pins_default: leds-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x034, PIN_OUTPUT, 7) /* (H21) OSPI0_CSN2.GPIO0_13 */ >; }; main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ >; }; main_mdio1_pins_default: main-mdio1-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ >; }; main_mmc0_pins_default: main-mmc0-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y3) MMC0_CMD */ AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */ AM62X_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA2) MMC0_DAT0 */ AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ >; }; main_rgmii1_pins_default: main-rgmii1-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */ AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */ AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */ AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */ AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */ AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */ AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */ AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */ AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */ AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */ AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */ >; }; ospi0_pins_default: ospi0-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ >; }; pmic_irq_pins_default: pmic-irq-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */ >; }; }; &a53_opp_table { opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; opp-supported-hw = <0x01 0x0004>; }; }; &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; }; &cpsw3g_mdio { pinctrl-names = "default"; pinctrl-0 = <&main_mdio1_pins_default>; status = "okay"; cpsw3g_phy1: ethernet-phy@1 { compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; reg = <1>; ti,rx-internal-delay = ; ti,fifo-depth = ; }; }; &mailbox0_cluster0 { mbox_m4_0: mbox-m4-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; }; &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; status = "okay"; pmic@30 { compatible = "ti,tps65219"; reg = <0x30>; buck1-supply = <&vcc_5v0_som>; buck2-supply = <&vcc_5v0_som>; buck3-supply = <&vcc_5v0_som>; ldo1-supply = <&vdd_3v3>; ldo2-supply = <&vdd_1v8>; ldo3-supply = <&vcc_5v0_som>; ldo4-supply = <&vcc_5v0_som>; pinctrl-names = "default"; pinctrl-0 = <&pmic_irq_pins_default>; interrupt-parent = <&gic500>; interrupts = ; interrupt-controller; #interrupt-cells = <1>; ti,power-button; system-power-controller; regulators { vdd_core: buck1 { regulator-name = "VDD_CORE"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <850000>; regulator-boot-on; regulator-always-on; }; vdd_3v3: buck2 { regulator-name = "VDD_3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; vdd_ddr4: buck3 { regulator-name = "VDD_DDR4"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-boot-on; regulator-always-on; }; vddshv5_sdio: ldo1 { regulator-name = "VDDSHV5_SDIO"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-allow-bypass; regulator-boot-on; regulator-always-on; }; vddr_core: ldo2 { regulator-name = "VDDR_CORE"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <850000>; regulator-boot-on; regulator-always-on; }; vdda_1v8: ldo3 { regulator-name = "VDDA_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; vdd_2v5: ldo4 { regulator-name = "VDD_2V5"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-boot-on; regulator-always-on; }; }; }; eeprom@50 { compatible = "atmel,24c32"; pagesize = <32>; reg = <0x50>; }; i2c_som_rtc: rtc@52 { compatible = "microcrystal,rv3028"; reg = <0x52>; }; }; &mcu_m4fss { mboxes = <&mailbox0_cluster0 &mbox_m4_0>; memory-region = <&mcu_m4fss_dma_memory_region>, <&mcu_m4fss_memory_region>; status = "okay"; }; &ospi0 { pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; status = "okay"; serial_flash: flash@0 { compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <25000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <0>; }; }; &sdhci0 { pinctrl-names = "default"; pinctrl-0 = <&main_mmc0_pins_default>; disable-wp; non-removable; status = "okay"; };