// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
 *
 * EVM Board Schematics: https://www.ti.com/lit/zip/sprr458
 */

/dts-v1/;

#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/gpio/gpio.h>
#include "k3-j784s4.dtsi"
#include "k3-j784s4-j742s2-evm-common.dtsi"

/ {
	compatible = "ti,j784s4-evm", "ti,j784s4";
	model = "Texas Instruments J784S4 EVM";

	memory@80000000 {
		/* 32G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
		      <0x00000008 0x80000000 0x00000007 0x80000000>;
		device_type = "memory";
		bootph-all;
	};

	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;

		c71_3_dma_memory_region: c71-dma-memory@ab000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xab000000 0x00 0x100000>;
			no-map;
		};

		c71_3_memory_region: c71-memory@ab100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xab100000 0x00 0xf00000>;
			no-map;
		};
	};
};

&mailbox0_cluster5 {
	mbox_c71_3: mbox-c71-3 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&c71_3 {
	mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
	memory-region = <&c71_3_dma_memory_region>,
			<&c71_3_memory_region>;
	status = "okay";
};