ELF>X@@  f%f u/,t)t6HH 1@RSH HtHǃt1t=tHH 1[f` [HX1z*xG [AWAAVAUIATIUSHLwMt LII AD$(1E1 mA9\$(~cHcHID$0HH(HtI H9 u tHPH@Eu;Hzt;I H9 uAA9\$(HD[]A\A]A^A_HxuŐIHxHWPHtEDD$ H$H$HHH DD$ E AAHfATIUHSH?HtH1MtA$8t H t  ۃ ؈ []A\HHxLgPMuL'HLHH ff.UHSHHH HtHD Et(H7C@9E~)HtHvH1H1[];EHtHvH1D$D$H[]ff.Eu1SH։ Ht09‰NEׅt 9| 91[t9|1ff.SHH?HtHf`w1G tH[fDATIUS`HeH%(HD$1HT$D$…x4D$HT$L` "\$@E؈\$\$HD$eH+%(uH[]A\f.ATAUSH/HHt HHHx HtHHHtAԾ x []A\HuEIHLEHtHv[H]1A\ATAUSH/HHt HHH AԾ~x []A\HuEIHLEHtHv[H]1A\ATUSHHH eH%(HD$1Ht HHŸ1D$fD$ fT$D$t!HD$eH+%(H[]A\HT$ƃ L LHx;D$f9D$t[HT$LHxLHH zHuHtHvH1D$f9D$uD$8D$uHuHtHvH1ƃ ff.SHH HtHSHЃ<wHu>H?LXD8Hq`A@HtHRHHǃX[<u[fAVAUATUSHHL eH%(HD$1Mt LIL{Lk6L9ʼnNՅExCtxCx_=pC|`=\ oǃ\ CuJCpHD$eH+%(H[]A\A]A^HxC|HCtCp뽽HT$"D$H Lt]{6v C<kpqI<$LXD8IN`AV@HtHHHxHCp/D$ƒDt@BEt1hHDtptHcŃDtkpC="D$뮄uOCpCuECpICu:CpCu2Cpt년u 1Cu CpTff.USHHH(Ht HHH{(HtH0Ht[]HEHxH_PHt%HHHH HfDATIUSH HHt HHŁ{?Bs L~tf[]A\uL1HHHuLXD8HtHvPH1X1[]A\L1HHf.ATUSHHH eH%(HD$1Ht HHŀ{D$w!HD$eH+%(H[]A\HT$L LHuD$tHT$LD$D$u@u)@tHuHtHvH1aHD$HD$ff.fATUSHPHHt HHHuLDHtHvH1HELPHpLH}HpLH[]A\@AVAUE1ATAUHSHHtHLmHHI|HDH8DH8A8tODH AtHHL[]A\A]A^HHL[]A\A]A^[H]A\A]A^AWIAVAUATIUSHPH/eH%(HD$H1Ht HHA$E1E|HD$HD$HD$HD$D$&At2 I"thHH HD$HeH+%(_HP[]A\A]A^A_ tE1 WM$JMBLt$ItLIHILLLwAHD$HD$D$AHD$D$ AHD$D$ AD$&fD$ AD$D$ AD$t D$A$Lt$MI8Ht$*HD$:HD$*HD$2HD$@HD$HD$HD$HD$D$&HHu_D$A Lt$A8D$LfD$A<fD$ HD$.HD$ HD$6HD$HD$>HD$D$FfD$$yHuHtHvH1HEHxH_PHuHHHHH HuHtHvH1UHHS`HHx.HHtHvI[AH1]HHtH[`H]AWAVAUATUHSHH L/eH%(HD$1Mt LIHc;C(LC0HILxHwDE1wRHHAątEHD$eH+%( H D[]A\A]A^A_ tE1 uLIItI( LHHtfA`vHH{DhHtHHD$Ht$HD$H?H|$HtHD;juHHH=HpHtH{ HH)HHH@H tH|$$$AE1lH|$Hc;C(THK0HHH@H@HaHH)HS HH@P7Dt HA LkMt LIEIUHHHhH9uvQtPA`AHs?AO HHHHA`HA!IUHEHHhH9tHHHIH=uAIH|$H$H$1EHzH_PHuHHHHH DAAɉf wzf w1AAA~RE¿AH4ׂCHiAHHH1DD9AGAu1Ҹ@A9Gȉ1AA~E¸$Af ESHH HtH H[HwwH˃ t uHHHAUATUSL/HMt LIL Mt0HA$tNu Hh tX[]A\A]Hww(I밃 t uLHIII}IT$#It$HtHH߽{ff.AUATUSL/HMt LIL MHŅuXHCIuM$ LHtHv1HHCI$ I$0I|$u []A\A]I$ tI$ A$!tHHwwI7 t uLIIDAWAVAUATUSL HMt LIHHh 1H1HDžh Hǃ Hǃ f ƅHHHHILh LHHI4$HLM`DHDE@HDHtHvPH1DHL XMt LILc#HkLLLHLH LLH LLH LH D I6  MO`EG@HtHvPARW1QHRL H(Mt LILsV HCVIFH LHIuHtHvMA 1HL Mt LILHL   H@LH H0f` vC H H Ct t H HHXz*x@ tvAƆ HHH HMN`HEIuEF@HtHvQ1HRPH[]A\A]A^A_Ct wAƆ HHnf<%` Ct t u1I}HtHHLHCHHHHH(HI E1f.ATUSH/HHt HHL MHuLK`DC@HtHv1HHu []A\I$Hh 11HHDžh IDŽ$ IDŽ$ fA$ ƅu[L]A\HwwI8 t uLIIAUATIUSL/Mt LII$ HD EuJu#HGA[D]A\A]EDHuYIuHtHvH1I$wwSHU tB uHE]A9TAu 8sHHIEHxHoPHtoHHHH ۃ   t 1ۄXH/댐HDH fAWAVAUATUSHHH eH%(H$1Ht HH1H|$HD$HHD$HD$H$u-H$eH+%(]HĠ[]A\A]A^A_LcsdL{hEE1IMHC HHEHLIM9uHT$HHL$H$H9r 9tDL$HuHtHv1HH|$HD$gH$DspE~8E1IIMBLtLHIEHIE9HD$HHT$H $H9r 9tDL$HuHtHv1HH|$HD$H$DE~;E1IIMHLBIEHIE9HD$HtVHT$H $H9r 9tDL$HuHtHvH1DEe IDspE I11 I0fDff.f?Bf.?B O@ @BMʉʅ~ Й)ЙfDUHSH HcHtHDžx9~[]HHxH_PHt/HHHH x[]H̐~$FHH Ht ;|<15DAWIAVEAUAATIUHS1ۉL9E9E} A9[]A\A]A^A_u} 9A$`AH4ׂCEHiҲHAHЉA9s!A$1A$[]A\A]A^A_9~lAWAVEAUIATIUHSH H Ht$DD$Ht HHLD`E$dAAEA$`DDD$AE9NfA wx\$D$9ˉD$NE1L$A9\$(9\$|,ELLH22IIuH []A\A]A^A_H H|$HtL$L$HD$H|$L$Hǘ Ht$L$f` v<wo\$)É9NÉD$ɃD$9bD ttELLH_t!D)9L$~*1ҸfA$@ t)t$HD$H0HtHvH111fA$@DAVIAUIATAUHS7DH׉?މAuHÉ?AD9t‰[])A\A]A^A6H?AuHÃ?‰[])A\A]A^Dpff.SHH[9NȅEAUATUHSH HD;HDA9ANՅDEH}6A9ĉANԅDED9AODD9N[]A\A]ATUSH HHt HHDCdEaDKpETL[hLLStEE111kD9}3A9~.HcHcA A; u݃HcA D9|͉H Ht HHHHHHPHHD_DƒsLHcE1MH~=DL1?E~H Qƒ9uIAD;|ɋIHc[E1]HLA\HEHxLgPM#HLHH DKpDCdfHEHxH_PHHHHH []A\ ǃHEHxHoPHuH/HHHH HxH-HEHxH_PHt8HHHH VH+L'Hff.ATUSHHeH%(HD$1H usHLcHt.HLtHC HS#LHHT$eH+%(H[]A\SLHLLH"HHT$D$H1Ht* HHDH1jD$ff.Su6C!HHcH [9}Dž۸OÃ~u[AT1USHoeH%(HD$1D$fT$@u%1HD$eH+%(H[]A\Huπu1H HT$xCDc t;EtHA9DExlHt$H}tDSHAff.GIH4ׂCHHHH@SHH HtHNj1uf` v[u󋃤[ff.~Hc1 HH9t 9u@AUIATIUHSH HcHtHDžx96HHxH_PHt]HHHH 1H?AEA$[]A\A]HHc~1 HH9t ;uDADE~01A9t$HcD9u?9uf1t$9|!S1ӄt 9[1fDH4ׂCHiҲHHff.@%SAf` wP  ۃAH7HtHvH1[9DFA9AFAwH7HtHvH11[H7HtHvA11HϻA\AL A <H4ׂCAVAAUIATEHiҲUDSDL$@HAH1HDA|$0u ۸9GIuHtHvQAHW1EDA`A5T$HL9FÉZY[]A\A]A^AWAVAAUAATIUSHL?Mt LIA)BA0HcHiaH )AkUHiQH%8CA9A$ DCAA BDDl$ IA8CÈD$ D$ I$ H$AD$ ‰ÀuvAu%1I$ 8r"u:\$ s6IHL9uI7HtHvDD$ H11H[]A\A]A^A_H<$1T$ 8rAT$ ~v{AHcHiۉH/)I7HtHvH1끐ff.tfAVAAUAATIUHSH Ht HHA$ `fH 1HtH HHtHNju_f` vgf`ҁD9A9 []A\A]A^Ct fjf []A\A]A^u싅tH E1HtH IHtHNjuQf` w uEt;fA$`A$ҁɁD9>A93`Df 7fSHH?HtHt)H t 1f` vt [1 u f`w fG ff.@f` ff.u5~*HcH Ht;|hUSHH HtHHcKp~1 HH9t;ltu[]HHxH_PHuHHHHH 1[]ff.fUHSHt[]E1[]DHfATIUHSHH HtHf` w%t []A\tA$iu []A\fATIHUHSHt'htHHLt H[]A\[1]A\f` w Eff.UHSHH?eH%(HD$1HtH1f` D$fD$w$ t"1HT$eH+%(uOH[] H Ht$9O~HT$HH  HH9t9@ff.AWAVE1AUATUHSHH(L'MtLLuIL M>HLE$D$…C;';HHAuHHD$.SL$HLD$DD9|$f{LLAljD$DLƉD$HLD$HD$t D‰D$HfA$` D$H([]A\A]A^A_Hww&I t uLIIvHH…uHL$D$I$X@*b|$RD$T$|$ЍBI9~&L M A$ A$ 9D$~HLt$LAA…tWEHLD$T$t$LA…pT$H(HL[]A\A]A^A_HLHHD$ |$AAN u)fA$` D |$DT$'Lj@PD$0PDL$ DCL$T$4t$0SL$ Ht$ADT$?HfE!fA$` E=^HLHt EЋD$‰Ai$ @B9 Hww/I t uL|$\I DT$H  f% fADT$ff.f,t(tHH 1ff.@臻fff.fAWEAVIAUIATIUSHHHDD$eH%(HD$@H HD$Ht HHD$LI.AD$(utA?BAƅH}A,HtT$T$Hǃt,HT$@eH+%(eHH[]A\A]A^A_" tNjEuM>1LD$?f|$=HL|$Aƅ,AD$A|$Ht$=D$HD$|$,H L|$=LcO4~bHl$0LMDt$Ld$ Dd$,H\$5A9|'DL$HL$ ALHt$H|$%HL9t E@A9~HD$H0HtHvAH1L Mt LILHM6…aAD$JAAD$ AAD$9OAL$A|9LfA@AA|HL$(hABA7|$(u1AB A<H]Ht HHþ fAAfAPk~+iKh=^l t 9}fAJL A f`9OAFAt AFH 9OAD IDA^A@E|H|$Aƅ8ABH7HtHvDʃPHiqA1RX1ZdABktH ABHD$H0HtHvE1H1f`  H3HtHvH1A@E|H|$DʃAH7iqHtHvD$1QHYD$^DL$ALLLHQE|Ict$LHHiVUUUH )@A;D$}=I7HtHvH1AHl$0H\$E|A;D$*붹l6HD$H0HtHvH1ff.AWAVAAUIATAUHSLH(hD%$E1LD$Eu\ 9NEE‹C9OиEECLD $C ,҃SE!|9OщSEzCCHHLIM H$Mt LINjSxHMAAA9DOEIcA1Hi*H$D)D$@CAA9|jCDS1IDc[ AI7Hy |I`MXE8HtHvPATRARSASUW1QHHHH([]A\A]A^A_I HtHHc|E IHHiVUUUH )A 9ʉN@EE RA|SEtiI HtHf` $w EЋK9M9ыKM‰C9M9LЋ$StC A}hyHHL$HL$9LCI Ht HL$HA Auf` EAAHcSH<$HHL$HHiVUUUH )荱DSHL$IfA9ANfDESAE9EODDc[ AiqLEAOA9LvD D9fE]H7HtHvH1HD$HD$ )A|H|$D9HD$DMEt$ET$$AEAHAA~SIDHtً0t$EDLuT$$H|$HD$D9AO|1AWAVIAUATUHSH`L/HT$L$eH%(HD$X1Mt LIHD$IHHD$qE1I$AHD$8H$HD$@HD$HHD$PtHt$H<$LsA|AHt$H<$ p@H))HH!A7fA` AǃA Du1H|$AhLHIIuA$HIID@MDȅLEHtHvRH1H\$T$$LLD$@HZMHT$HL$8LHAA@AEDA8*A@E|FA|MUEEHHiqMtMRWH1PRVLAS1H(HT$XeH+%(qH`[]A\A]A^A_ tfE1 L~A$@t|H|$11>IuHtHvH1nI(Ht$H<$LA|A@AÉT$H<$1LD$8LdHD$HH詰iA|T$PL$T9@@l$3MALl$(MA,DuDA|hIE1t$4ELL$ AE;|H<$D;D$8|;D$<Dd$@D;d$D~ ED;d$DD9DLt$ ADl$3MLl$(AA|EA?BfjLD$E1H|$LYÅc.t$4LL$ T$PAA9Ml$3Ll$(Mλ%I`H0ff.fAWAVAUATAUHSHHH$HHt HH‹1ɃLL`HT$LMLt2Au(HT$H2HtHvH11LL0LEH$DHމ,H…t0t Au9H[]A\A]A^A_ t1Ƀ /H#HLLD$T$tǃ0LUH$DHމ,HH[]A\A]A^A_/ff.@8t%@|BI|fDf`  uff.,1uu|uH`fDATIUHSH?HHtHI$Gu1f` wt#A$t/uLHHu#1ƃm[]A\u݁?Bƃm[]A\AWAVAUATIUSw1u\ƀiLAD$(1ۅ~6HcHID$0HH(HtH@Hxt L9 t9A9\$([]A\A]A^A_ t1 uHtHlL}Lu@LI@@H uLHL#Hk@HI$@@H d[H]A\A]A^A_fDAWIAVAUATIUSHH L7Mt LII`HD$A$`1LHt$LHD$D$u-Ax =A'%D$ fAHLLu |$3A,#1҅u(A|tH|$A?BAdA`A8AA@D$DEDAƇPEQERI6HtHvH1DL$DD$DD$DL$AADfAAADfAAADfAAADfAAADfAAAAA|fEAA|HLLA?B6AA|MA|$%DAPtAQAAHLA$t LHLLLHLMeHD$MtLIIEHD$Ht$LLItA7A\A A`I}uA$H|$tA,t{w At^A,A |AƇtnSVA|fAuHmHt HHHt7I8HHuHtHvH11H []A\A]A^A_ 1 I$1v A8A`A,A|BD$KHL_A,1҅AzIH8HtA,HAAƇvAu{ALJx%D$D$A|Ic|HHiVUUUH )AILJL IXB*bH []A\A]A^A_1HLLR A |1|Ht$L"A |A8AƇ"AƇ ALJmAtALJALJAAƇ=6ALJxEALJx av8D$QAfAuqt(D$uD$ v D$MLAD$ tA AxAPAƇAt AQAA|$AMҁ⎐DAPAQAAA`AxHHxLgPMHLHH tv D$AtH|$ALJAAƇAUfAuID$L'HwLJ<fGW ff.SHH߉pƃHǃǃ[@ATIUHSHHHtHI|$wPHw %1ۃuVH0HtHvH1HLH[]A\ t uHt[]A\f.UHSHWwU1ۃwcH;HtHǃuOH7HtHvH1HH[] t1ۃ uHH[]fATIUHSHHHtHA$8tGH t t=HHxH_PHteHHHH []A\HH裚 uH߾軞H߾[]A\JHDATIUHSHHHtHA$8tIH t  u=HHxH_PHt^HHHH []A\1HH ˙uH1荞H1[]A\ߝHf.Ƈ ATUSHH HtHHH7 LM`DE@HtHvP1H L HH?HH9HGJ< XH9x []A\H)tHHu[]A\ff.AUATAUSHHH eH%(HD$1Ht HHC<vqA<HT$Dd$H HHt0HuLXD8HtHvPH1XHD$eH+%(H[]A\A]CtC#uiH L AHHT$LD$tAuH: ]HD$eH+%(uHH []A\A]ff.ATUHS1ۃHLLL牃|pƃHǃǃǃf[]A\ t1ۃ XHLHDLTfAUATUHSL'HMt LIċE1IcDIH1 HH9; u8t.I4$LK8DCHtHvH1M 1AOt8ANt.I4$LK8DCHtHvH1M 1[]A\A] tE1 4L(I I4$LK8DCHtHvH1M 1$ff.@AWAVAUATUSHH0H eH%(HD$(1Ht HHC% tCu'HD$(eH+%(H0[]A\A]A^A_HtJIрLtXYt t9Oхt uL Mt LID$'IuD HtHv1EHHDJID‸Lt XYtt A9DOIuHtHvE1HE9L ENDd$ EHD$ 'L$L$IuHtHvDD$1HLHD$'HD$1LA HeH$+LuAL$AT$E|$D$AD$Et$D\$DDT$@El$ D$ AD$L$1HH|$HHD$H}HfA` IHHK8SHtH@HHHT$xLHD$xHDŽ$1ҹDTxt5iHH#THHuǃPƃtPuHD$H0HtHv1AHI?HK8SHtHH&HHD$HHI7LM`DE@HtHvH1D$wL$wD8tmI2AqDHtHvL\$1HLT$RZLT$L\$fA` I:HtHHǃD$ HD$HHxHWPHuHHT$ HT$ HHH LI?HK8SHtHHI:HtHDHLHT$w6AqD$ %HD$HD$H\ptrUHSHHHHXH9uoutput_formatMissing case (%s == %ld) format%s %s: [drm] %sInput DSC BPC forced to %d enabledisableFailed to read source OUI Failed to write source OUI 128b/132b8b/10bSink specific irq unhandled [CONNECTOR:%d:%s] typedrm_WARN_ON(len < 0)DSC DPCD: %*ph drm_WARN_ON(transcoders != 0)registering %s bus for %s yesnoPCON ENCODER DSC DPCD: %*ph output_format, %s%d./include/linux/seq_buf.hsource rates: %s sink rates: %s common rates: %s Forcing DSC fractional bpp lane_countUnsupported BPP %u, min %u Unsupported BPP %u, min 8 Unsupported Slice Count %d drm_WARN_ON(i < 0)onoff D0D3PCON max rate = %d Gbps MAX_FRL_BW_MASK = %u FRL_TRAINED_MASK = %u FRL trained with : %d Gbps FRL training Completed Failed to set pcon DSC crtc_state->output_formatFEC CAPABILITY: %x sdp->db[17] & 0x7Failed to unpack DP VSC SDP Failed to unpack DP AS SDP SSTMSTSST w/ sideband messaginglongshortDPRX ESI: %4ph Failed to ack ESI eDPDPeDP DPCD: %*ph HDCP init failed, skipping. drivers/gpu/drm/i915/display/intel_dp.cdrm_WARN_ON((for_get_ref && !new_conn_state->crtc) || (!for_get_ref && !old_conn_state->crtc))drm_WARN_ON(!connector->dp.dsc_decompression_aux)Cannot force DSC BPC:%d, due to DSC BPC limits Failed to %s sink compression passthrough state Failed to %s sink decompression state [drm] *ERROR* [CONNECTOR:%d:%s][ENCODER:%d:%s] Invalid DPCD max lane count (%d), using default [drm] *ERROR* [CONNECTOR:%d:%s][ENCODER:%d:%s] Invalid DPCD with no link rates, using defaults drm_WARN_ON(!wait_for_completion_timeout(&conn_state->commit->hw_done, msecs_to_jiffies(5000)))[ENCODER:%d:%s] %s link not ok, retraining buffer size is smaller than hdr metadata infoframe wrong static hdr metadata size [drm] *ERROR* Failed to read DPCD register 0x%x [CONNECTOR:%d:%s] VRR capable: %s [CONNECTOR:%d:%s] DFP max bpc %d, max dotclock %d, TMDS clock %d-%d, PCON Max FRL BW %dGbps [CONNECTOR:%d:%s] RGB->YcbCr conversion? %s, YCbCr 4:2:0 allowed? %s, YCbCr 4:4:4->4:2:0 conversion? %s Cannot force DSC output format drm_WARN_ON(!source_can_output(intel_dp, output_format))drm_WARN_ON(index < 0 || index >= intel_dp->num_common_rates)drm_WARN_ON(!intel_dp->num_source_rates || !intel_dp->num_sink_rates)drm_WARN_ON(intel_dp->num_common_rates == 0)drm_WARN_ON(!is_power_of_2(intel_dp_max_common_lane_count(intel_dp)))drm_WARN_ON(intel_dp->num_common_rates * num_common_lane_configs > (sizeof(intel_dp->link.configs) / sizeof((intel_dp->link.configs)[0]) + ((int)sizeof(struct {_Static_assert(!(__builtin_types_compatible_p(typeof((intel_dp->link.configs)), typeof(&(intel_dp->link.configs)[0]))), "must be array");}))))drm_WARN_ON(idx < 0 || idx >= intel_dp->link.num_configs)Set dsc bpp from %d to VESA %d Max link bpp is %u for %u timeslots total bw %u pixel clock %u Unsupported slice width %d by DP DSC Sink device Computed BPC is not in DSC BPC limits No Valid pipe bpp for given mode ret = %d Compressed Slice Count not supported DSC Sink Line Buffer Depth invalid Cannot compute valid DSC parameters for Input Bpp = %dCompressed BPP = %d.%04d DP DSC computed with Input Bpp = %d Compressed Bpp = %d.%04d Slice Count = %d clamping bpp for eDP panel to BIOS-provided %i [ENCODER:%d:%s][CRTC:%d:%s] DP link limits: pixel clock %d kHz DSC %s max lanes %d max rate %d max pipe_bpp %d max link_bpp %d.%04d DSC required but not available Try DSC (fallback=%s, joiner=%s, force=%s) DP lane count %d clock %d bpp input %d compressed %d.%04d link rate required %d available %d YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB. MSO link count %d, pixel overlap %d drm_WARN_ON(vsc->bpc == 6 && vsc->pixelformat != DP_PIXELFORMAT_RGB)couldn't set HDR metadata in infoframe drm_WARN_ON(!connector->dp.dsc_decompression_aux || connector->dp.dsc_decompression_enabled)drm_WARN_ON(!connector->dp.dsc_decompression_aux || !connector->dp.dsc_decompression_enabled)[CONNECTOR:%d:%s] Performing OUI wait (%u ms) [ENCODER:%d:%s] Set power to %s failed [ENCODER:%d:%s] Forcing full modeset due to unsupported link rate [ENCODER:%d:%s] Forcing full modeset due to DSC being enabled [ENCODER:%d:%s] Forcing full modeset to compute panel replay state Sink max rate from EDID = %d Gbps Couldn't set FRL mode, continuing with TMDS mode Issue with PCON, cannot set TMDS mode Failed to %s protocol converter HDMI mode Failed to %s protocol converter YCbCr 4:2:0 conversion mode Failed to %s protocol converter RGB->YCbCr conversion mode [drm] *ERROR* Failed to read FEC DPCD register pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp Failed to unpack DP HDR Metadata Infoframe SDP drm_WARN_ON(!intel_crtc_has_dp_encoder(crtc_state))[ENCODER:%d:%s] retraining link (forced %s) [ENCODER:%d:%s] link retraining failed: %pe drm_WARN_ON(!drm_modeset_is_locked(&display->drm->mode_config.connection_mutex))drm_WARN_ON(intel_dp_is_edp(intel_dp))[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s -> enable: %s Broken DP branch device, ignoring MST device may have disappeared %d vs %d ignoring %s hpd on eDP [ENCODER:%d:%s] drm_WARN_ON_ONCE(intel_dp->active_mst_links < 0)failed to get ESI - device may have failed [drm] *ERROR* [ENCODER:%d:%s] Failed to read link status got hpd irq on [ENCODER:%d:%s] - %s %s %s: [drm] Not enough lanes (%d) for DP on [ENCODER:%d:%s] drm_WARN_ON(intel_encoder_is_tc(encoder) && ((&_Generic(display, const struct drm_i915_private *: __i915_to_display((struct drm_i915_private *)(display)), struct drm_i915_private *: __i915_to_display((struct drm_i915_private *)(display)), const struct intel_display *: (display), struct intel_display *: (display))->info.__runtime_info)->ip.ver) < 30)drm_WARN_ON((display->platform.valleyview || display->platform.cherryview) && port != PORT_B && port != PORT_C)Adding %s connector on [ENCODER:%d:%s] drm_WARN_ON(!((((dev_priv)->pch_type) == PCH_IBX) || (((dev_priv)->pch_type) == PCH_CPT)))[drm] LVDS was detected, not registering eDP [drm] [ENCODER:%d:%s] unusable PPS, disabling eDP drm_WARN_ON(intel_dp->dpcd[0x000] != 0)[drm] [ENCODER:%d:%s] failed to retrieve link info, disabling eDP [drm] [ENCODER:%d:%s] HPD is down, disabling eDP [drm] [ENCODER:%d:%s] VGA converter detected, disabling eDP [CONNECTOR:%d:%s] Using OpRegion EDID [drm] *ERROR* Failed to read MSO cap [drm] *ERROR* Invalid MSO link count cap %u Sink MSO %ux%u configuration, pixel overlap %u [drm] *ERROR* No source MSO support, disabling [CONNECTOR:%d:%s] using generated MSO mode: "%s": %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x [drm] [ENCODER:%d:%s] failed to find fixed mode for the panel, disabling eDP drm_WARN_ON(intel_dp->source_rates || intel_dp->num_source_rates) ? ' !      m d d d V   x     +  [ z   +  @  <    <     xx`=xK`=xK8`=xK`=@ \ @BpxK8`=L \ @BxK8`=L \ @Bp  (0 i915.import_ns=PWMGCC: (Debian 12.2.0-14) 12.2.0GNU m4F .a}uP:Px E$E] zx   P0?p/Yhw0 !`&;&'+7 DE)[+u.2`0 @ ?P3PU ( 0w^6ЇFL^ w `` , , ( ( 0  ` @ 8>DJPU[i|`+4Pk~(O\ %Bg < X {       & ? S p |      ' < V u      F X z   $  % P% %: %  5 O *h */  +x   %@Ws/hp11,,1 H2U\p2,p2p3~4:P4%44566Ss888:i@;!;;O<+<;A]=t0=g=O>%P>:Qf} DADDDB7Po0KV:7@W$QWJnWX: Y #:Sl6HWc$p0dLdPee;f_g~gh  j kQ<l.Xu+Fq7b}&E tkvxxx6@y(9zVKj`mqp8,GBa@SS 6 Sc 9Mh`!0P:PTMg  F PG[ z  { @: ( !!5!T!u!!!!!"2"]"""""""" ##C#m######$&$<$\$w$$$$$$%D%X%o%%%%Ы%%p&1&Y&q&&&&'intel_dp.cintel_dp_dsc_max_sink_compressed_bppx16source_can_outputintel_dp_dsc_aux_ref_countintel_dp_force_dsc_pipe_bppintel_dp_tmds_clock_validhas_seamless_m_nwrite_dsc_decompression_flagintel_dp_sink_set_dsc_passthroughintel_dp_sink_set_dsc_decompressionintel_dp_init_source_ouiintel_dp_set_max_sink_lane_countintel_dp_set_sink_rateswait_for_connector_hw_doneintel_dp_link_okintel_dp_check_device_service_irqintel_dp_modeset_retry_work_fnintel_dp_oob_hotplug_eventintel_write_dp_sdpintel_dp_read_dsc_dpcdintel_dp_connector_atomic_checkget_max_compressed_bpp_with_joiner.isra.0intel_dp_connector_unregisterintel_dp_get_modesintel_dp_connector_registerintel_dp_set_edidintel_dp_forceintel_dp_output_formatintel_dp_print_ratesforced_link_ratedsc_compute_link_configdsc_compute_compressed_bppvalid_dsc_bpplink_config_cmp_by_bwintel_dp_set_common_ratesintel_dp_get_dpcdintel_dp_needs_link_retrainvalid_dsc_slicecountintel_dp_mode_validintel_dp_compute_link_configintel_dp_compute_output_formatCSWTCH.512bw_gbps.9intel_dp_detect_dsc_capsintel_dp_detect.LC82__already_done.10intel_dp_connector_funcsintel_dp_connector_helper_funcsbmg_rates.6mtl_rates.5icl_rates.4g4x_rates.0hsw_rates.1bxt_rates.3skl_rates.2__UNIQUE_ID_import_ns751__UNIQUE_ID___addressable___SCK__might_resched55.11.LC78.LC79.LC80.LC90.LC2.LC43__warn_printk__x86_return_thunk__drm_to_displaydev_driver_stringintel_dp_connector_sync_state__drm_dev_dbgintel_hdmi_tmds_clockintel_panel_drrs_typedrm_dp_dpcd_readdrm_dp_dpcd_write__stack_chk_fail_dev_errdrm_dp_bw_code_to_link_ratedrm_dp_lttpr_max_link_ratedrm_dp_lttpr_countwait_for_completion_timeoutdrm_dp_128b132b_lane_channel_eq_donedrm_dp_channel_eq_okintel_dp_dump_link_statusintel_hdcp_handle_cp_irqintel_dp_test_requestmutex_lockdrm_connector_set_link_status_propertymutex_unlockdrm_kms_helper_connector_hotplug_eventdrm_mode_object_put_raw_spin_lock_irq_raw_spin_unlock_irqintel_hpd_schedule_detectionintel_hdmi_infoframe_enabledrm_dp_vsc_sdp_pack__x86_indirect_thunk_raxhdmi_drm_infoframe_pack_onlyintel_digital_connector_atomic_checkintel_dp_mst_source_supportdrm_dp_mst_root_conn_atomic_checkintel_connector_needs_modesetdrm_connector_list_iter_begindrm_connector_list_iter_nextdrm_atomic_get_connector_statedrm_atomic_add_affected_planesdrm_connector_list_iter_enddrm_atomic_add_affected_connectorsintel_atomic_get_crtc_statedrm_dp_aux_unregisterintel_connector_unregisterdrm_edid_connector_add_modesintel_panel_get_modesdrm_dp_downstream_modedrm_mode_probed_addintel_connector_registerdrm_dp_aux_registerintel_bios_encoder_is_lspconlspcon_initlspcon_detect_hdr_capabilitydrm_connector_attach_hdr_output_metadata_propertydrm_edid_freedrm_connector_set_vrr_capable_propertydrm_edid_dupdrm_edid_connector_updateintel_vrr_is_capabledrm_dp_downstream_max_bpcdrm_dp_downstream_max_dotclockdrm_dp_downstream_min_tmds_clockdrm_dp_downstream_max_tmds_clockdrm_dp_get_pcon_max_frl_bwdrm_dp_downstream_420_passthroughdrm_dp_downstream_rgb_to_ycbcr_conversiondrm_dp_downstream_444_to_420_conversiondrm_edid_read_ddcintel_display_driver_check_access__drm_debugseq_buf_printfintel_dp_is_edpintel_dp_is_uhbrintel_dp_link_symbol_sizeintel_dp_link_symbol_clockintel_dp_common_rateintel_crtc_num_joined_pipesdrm_dp_dsc_sink_bpp_incrdrm_dp_max_dprx_data_rateintel_dp_max_common_rateintel_dp_max_source_lane_countintel_bios_dp_max_lane_countintel_dp_max_common_lane_countintel_tc_port_max_lane_countdrm_dp_lttpr_max_lane_countsort_rintel_dp_init_lttpr_and_dprx_capsdrm_dp_read_sink_count_capdrm_dp_read_sink_countdrm_dp_read_downstream_infodrm_dp_read_descintel_init_dpcd_quirksintel_dp_max_lane_countintel_psr_enableddrm_dp_dpcd_read_phy_link_statusintel_psr_link_okintel_dp_link_requiredintel_dp_effective_data_rateintel_dp_max_link_data_rateintel_dp_has_joinerintel_dp_rate_indexintel_dp_link_config_getintel_dp_link_config_indexintel_dp_link_params_validintel_dp_mode_to_fec_clockintel_dp_bw_fec_overheadintel_dp_dsc_nearest_valid_bppintel_dp_dsc_get_max_compressed_bppintel_dp_dsc_get_slice_countdrm_dp_dsc_sink_max_slice_countintel_dp_min_bppintel_dp_output_bppintel_dp_num_joined_pipesintel_dp_has_dscintel_dp_source_supports_tps3intel_dp_source_supports_tps4intel_dp_max_link_rateintel_dp_rate_selectintel_dp_compute_ratedrm_dp_link_rate_to_bw_codeintel_dp_has_hdmi_sinkintel_dp_supports_fecintel_dp_supports_dscintel_dsc_source_supportintel_dp_dsc_max_src_input_bpcintel_dp_dsc_compute_max_bppdrm_dp_dsc_sink_supported_input_bpcsintel_cpu_transcoder_mode_validintel_panel_fixed_modedrm_mode_is_420_onlyintel_panel_mode_validdrm_mode_is_420_alsointel_mode_valid_max_plane_sizeintel_dp_dsc_sink_min_compressed_bppintel_dp_dsc_sink_max_compressed_bppintel_dp_dsc_min_src_input_bpcintel_dp_dsc_compute_configintel_dsc_compute_paramsdrm_dp_dsc_sink_line_buf_depthdrm_dsc_compute_rc_parametersintel_dp_compute_config_limitsintel_dp_test_compute_configintel_hdmi_bpc_possibleintel_dp_mtp_tu_compute_configintel_panel_highest_modeintel_dp_config_required_rateintel_dp_joiner_needs_dscintel_dp_limited_color_rangedrm_default_rgb_quant_rangeintel_dp_audio_compute_configintel_audio_compute_configintel_dp_queue_modeset_retry_for_linkdrm_mode_object_getqueue_work_onintel_dp_compute_configintel_link_compute_m_nintel_vrr_compute_configintel_psr_compute_configintel_alpm_lobf_compute_configintel_panel_downclock_modeintel_cpu_transcoder_has_m2_n2drm_hdmi_infoframe_set_hdr_metadataintel_panel_fittingintel_panel_compute_configintel_cpu_transcoder_has_drrsdrm_mode_vrefreshintel_zero_m_nintel_dp_set_link_paramsintel_dp_reset_link_paramsintel_edp_backlight_onintel_backlight_enableintel_pps_backlight_onintel_edp_backlight_offintel_pps_backlight_offintel_backlight_disableintel_dp_sink_enable_decompressionintel_dp_sink_disable_decompressionintel_dp_invalidate_source_ouiintel_dp_wait_source_oui__msecs_to_jiffiesschedule_timeout_uninterruptibleintel_dp_set_powerlspcon_resumemsleeplspcon_wait_pcon_modeintel_dp_sync_stateintel_dp_initial_fastset_checkintel_dp_check_frl_trainingdrm_dp_pcon_hdmi_link_activedrm_dp_pcon_frl_preparektime_get_raw__SCT__might_rescheddrm_dp_pcon_is_frl_readyusleep_range_statedrm_dp_pcon_frl_configure_1drm_dp_pcon_frl_configure_2drm_dp_pcon_frl_enabledrm_dp_pcon_hdmi_link_modeintel_dp_pcon_dsc_configuredrm_dp_pcon_enc_is_dsc_1_2intel_hdmi_dsc_get_slice_heightdrm_dp_pcon_dsc_max_slicesdrm_dp_pcon_dsc_max_slice_widthintel_hdmi_dsc_get_num_slicesdrm_dp_pcon_dsc_bpp_incrintel_hdmi_dsc_get_bppdrm_dp_pcon_pps_override_paramintel_dp_configure_protocol_converterdrm_dp_pcon_convert_rgb_to_ycbcrintel_dp_get_dsc_sink_capintel_edp_fixup_vbt_bppintel_dp_update_sink_capsintel_dp_needs_vsc_sdpintel_dp_set_infoframesintel_dmc_wl_getto_intel_uncoreintel_dmc_wl_putintel_read_dp_sdphdmi_drm_infoframe_unpack_onlyintel_dp_has_connectorintel_dp_get_active_pipesdrm_modeset_lockintel_dp_flush_connector_commitsintel_dp_link_check_intel_modeset_lock_begin_intel_modeset_lock_loop_intel_modeset_lock_endintel_modeset_commit_pipesintel_dp_check_link_stateintel_encoder_link_check_queue_workintel_digital_port_lockintel_digital_port_unlockintel_digital_port_connected_lockedintel_tc_port_handles_hpd_glitchesintel_display_power_get__intel_display_power_put_asyncintel_digital_port_connectedmutex_is_lockedintel_display_device_enabledintel_pps_vdd_onintel_dp_test_resetdrm_dp_mst_topology_mgr_set_mstdrm_dp_set_subconnector_propertyintel_pps_vdd_offdrm_dp_read_mst_capdrm_probe_ddcintel_dp_mst_verify_dpcd_stateintel_psr_init_dpcdintel_dp_mst_prepare_probedrm_dp_as_sdp_supportedintel_dp_encoder_flush_workintel_encoder_link_check_flush_workintel_dp_mst_encoder_cleanupintel_pps_vdd_off_syncintel_pps_wait_power_cycleintel_dp_aux_finiintel_dp_encoder_suspendintel_dp_encoder_shutdownintel_dp_hpd_pulseintel_dp_read_dprx_capsintel_pps_have_panel_power_or_vdddrm_dp_mst_hpd_irq_handle_eventmemchr_invdrm_dp_mst_hpd_irq_send_new_requestintel_psr_short_pulseintel_dp_test_short_pulsedrm_dp_pcon_hdmi_frl_link_error_countintel_dp_is_port_edpintel_bios_encoder_data_lookupintel_bios_encoder_supports_edpintel_dp_has_gamut_metadata_dipintel_dp_init_modeset_retry_workintel_dp_init_connectorintel_encoder_is_tcintel_dp_aux_initdrm_connector_init_with_ddcintel_connector_attach_encoderintel_ddi_connector_get_hw_stateintel_connector_get_hw_stateintel_encoder_is_c10phyintel_bios_dp_max_link_rateintel_dp_mst_encoder_initdrm_connector_attach_dp_subconnector_propertyintel_attach_broadcast_rgb_propertydrm_connector_attach_content_type_propertyintel_attach_hdmi_colorspace_propertyis_hdcp_supportedintel_dp_hdcp_initintel_psr_initvlv_pps_pipe_initintel_get_lvds_encoder_dev_infointel_display_power_flush_workdrm_connector_cleanupintel_attach_dp_colorspace_propertydrm_connector_attach_vrr_capable_propertydrm_connector_attach_max_bpc_propertyintel_attach_force_audio_propertyintel_bios_init_panel_earlyintel_pps_initintel_bios_fini_panelintel_hpd_enable_detectionintel_alpm_init_dpcddrm_dp_read_dpcd_capsintel_bios_dp_has_shared_aux_chintel_bios_init_panel_lateintel_panel_add_edid_fixed_modesdrm_mode_set_nameintel_panel_preferred_fixed_modeintel_panel_initintel_backlight_setupintel_attach_scaling_mode_propertydrm_connector_set_panel_orientation_with_quirkintel_pps_init_lateintel_encoder_is_combointel_opregion_get_edidvlv_pps_backlight_initial_pipeintel_panel_add_vbt_lfp_fixed_modeintel_dp_mst_suspenddrm_dp_mst_topology_mgr_suspendintel_dp_mst_resumedrm_dp_mst_topology_mgr_resumedrm_helper_probe_single_connector_modesintel_connector_destroyintel_digital_connector_duplicate_statedrm_atomic_helper_connector_destroy_stateintel_digital_connector_atomic_set_propertyintel_digital_connector_atomic_get_property__SCK__might_resched@ I NFH 5 FDHI (  <(FwHI  <F)HT `K LKL]HzMN O2PfH o h H9 o@ hU (HNBONQn wzK KPHC PHRHST N U  R P4 HN Vq Ix  < F H W X Y 4 p@ KY Y`  H N" OG S Kd Zs [ P H  K\] ^(_qHabbbHd  FTewfyg K!I( 2 <:FX dKkPN   4H|hijk3HUl_mnopp{Hqo#rHpI  <FPs)H@uvwxH4y_ 7iKz{|}~MHc V R 0%K0EHev XKHDNq YvKHHHLH{ V R V K V  RW \Rlx R V RH "K*K H ( KC!IJ! HT! <\!F! v! !F'"HZ"" " " "# !#KS# e# p# y## #K$  $ "$ +$o$ {$K$ $ $ $P%H&I#& -& <5&F&'H'R( <D(H() )K**2*<*b*t**)+O+Z++H`,Hk,,- )C-IJ- T- <\-F-I- @- <-F-I- - <.F6.I=. G. <O.F.../P/[/w/N/P0  0 0F&0000C1P1P2H2H2I2  3 <3F+345 5KU5 c5K5 5K^6 k6K66Hj7 <@77 <D7 97K"8m8 Xy8K9H\9Hp9H:H$:H:H(<Hh<Io< Uy< <<F<<N=H==x>H>>PG?Hw????@@'@Z@@AA?B[BBB/CCED LD QDFEH)EnEH.FF FKFHpGGH&HHH I #IKYII 9IKI IK#J 8(JKJJ JKJ KKKPrK|KKL4LHL kL  LKMHMHN,NHN hN,O 8OKO9PHPPCQaQpQ RwQ VQ  QKQR RR  RKS!S  -SKPSS>TnTT#U/UPwUHUU @ UKUVWWH:XgYYY`YYZHVZ[[  [Kg\\\]],]HE]]]d%^@>^HZ^v^  ^K_v_H`d``daA0bIbMb!cI(c  2c <:cFccBcc19dPddHd odKdxeHe oeKe fHBfIIf ( Sf <[fFfHgIg  %g <-gFgHg  hKhQhMhhHhOh t#i  /iKiiOii qiPfj}jjCuOZu oau hwu  uKuu hu uu ov  !v &vFRv  Yv ^vFvOvPvH6wNXw #|w HwH$xHx xxKgyHyy yfy!z z "zf,z!6z?z Rzf\z!1{ :{ ?{Fy{H{d{fH|#d| p|K|H}d,}f} I}K}HB~dm~f^ fjK 7' ,FBPyHHBlLmc$|&mԁpI& - <5FMPڂ)*HS&z%+* V% RN ([Kk, XKĄPY2f3rQ QfΆ4HfP1ufH) 3KC6Y7e859ƈ1H) 5KV:;<H 1HL=`H R V  Ši̊ R܊ V KBm> XKً4I; E <MF`?Hnji:wI~  <F@Ս.i R V ( =AbyBǎ ӎ  R , R3 V< E [ g  VُDEFG$H|  KLM" ) 5KXHN͒ ْKN@OeO KPZғ9HPQXRwHN @ŔR  %KA MKW.~  K   ǕKN O@.K=X=sIz  <F֖NOS/9P\UǗHݗ{U  ҘH  DM dfr!VřZI  <FOIV H` <hF[Ú ޚ K <\ <`X]f ^q _| JHHI   <F, <3 <DHO`aCbSHncd{ŝe͝f՝Wgh) 5KNij[Ӟ[ Bkz @lHmnП < <(' <0OjW[z <oW~pƠ <`Ҡa4qKqzI Frˡsӡt plF unvvwHx֢N<N[@y\ڣu$z1{AHzN RQ| pKFH <Ѧ <@I  <FU Zl}^}~ƧHH}+3E <0Rv5 PlN Kʩ ϩlܩ Kq K @RI  < F= Bl] bRoP#iIŬiݬ:ZGnGyGGG GGGmGGG GG-GGK+GdKGYGcGj GZ G GL G G8`ccbGKRGFGthGGG7G^ G"G$G2%Gh%G%G%G&GF&G 'Gt'G'G(GS*G*G*G+G(--G7/G!0GD0G0G1G1G192GQ2G2G2GP3G3G3G*4G/4G64Gq4G4G'5Gk5G6G8G8G8G8G9G9G;G];G;GO<G<G<G<G=Gk=G=G==G1>G>G@G4B]DGDGDGEGMGRGUVGWG`WGWGWGWGVXGXG7YGY`^Ga`GdGxdG e2eGeeGifG;gGgGChG^hGSiGijGlGlG&qKWrGtGuK wGgwKwRwGXxGxGyG"yGtzGi{GGɀGG܃GG.ffGօfGG~GGHNFmF|FG͐GܐG֑GVGGG'GvGG=GPGGGP (0@8@@HPpX`ph p xp  @ p !$%@%p%%P&& '()0*8*@+H+P.X/`P0h`1p1x11`22`33@44456888:0;p;;<<<  =(=0>8@>@?HDPpDXD`Dh KpOx@UV0WpWWXYc dd@eefggphjklqt v(w0x8x@xH0yPzXP`Ѐh`pxЄ0 @0`<RSU V(08@HPX,`-h/p0x^      >?ABm (08@0!H`!Pa!Xc!`d!h!p!x!!!$$$$$$$$$ &9&:&<&=&,-`-a-c- d-(z-0-8-@-H-P-X-`-h-p.x . . .#.S.T.V.W./000023333S<<< <(<0AD8UD@VDHXDPYDX c`>ch?cpAcxBc0f_f`fbfcfg1g2g4g5gv*v+v-v.vNvbvcvevfv -{(C{0D{8F{@G{HP0X1`3h4px9:<=QRTUa]ؙ  (088@lHmPoXp`ԛhp x  \ڦ  ЪSD D-D$(D0 4D<@DH?LDTXD`a!dDl!pDx$|E$E$E:&Da-D-D-D .DT.D0D3D<DVD D?cD `f$D,2g0D8+v<DDcvHDPD{TD\1`Dh:lDtRxDDD DmD DD DD`hЇp ? 0P.symtab.strtab.shstrtab.rela.text.data.bss.rodata.str1.1.rodata.str1.8.rela__patchable_function_entries.rela.discard.annotate_insn.rela__bug_table.rela.rodata.data..once.modinfo.rela.discard.addressable.rodata.cst2.comment.note.GNU-stack.note.gnu.property @ @8$8m&L,L12L@2XbTO@p vq@X @X I @ضP @( 0 28 X%F 0'@