[ { "EventCode": "0x0105", "EventName": "FP_MV_SPEC", "BriefDescription": "This event counts architecturally executed floating-point move operation." }, { "EventCode": "0x0112", "EventName": "FP_LD_SPEC", "BriefDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers." }, { "EventCode": "0x0113", "EventName": "FP_ST_SPEC", "BriefDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers." }, { "ArchStdEvent": "ASE_FP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point operation." }, { "ArchStdEvent": "SVE_FP_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point operation." }, { "ArchStdEvent": "ASE_SVE_FP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point operation." }, { "ArchStdEvent": "FP_HP_SPEC", "BriefDescription": "This event counts architecturally executed half-precision floating-point operation." }, { "ArchStdEvent": "ASE_FP_HP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD half-precision floating-point operation." }, { "ArchStdEvent": "SVE_FP_HP_SPEC", "BriefDescription": "This event counts architecturally executed SVE half-precision floating-point operation." }, { "ArchStdEvent": "ASE_SVE_FP_HP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE half-precision floating-point operation." }, { "ArchStdEvent": "FP_SP_SPEC", "BriefDescription": "This event counts architecturally executed single-precision floating-point operation." }, { "ArchStdEvent": "ASE_FP_SP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD single-precision floating-point operation." }, { "ArchStdEvent": "SVE_FP_SP_SPEC", "BriefDescription": "This event counts architecturally executed SVE single-precision floating-point operation." }, { "ArchStdEvent": "ASE_SVE_FP_SP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE single-precision floating-point operation." }, { "ArchStdEvent": "FP_DP_SPEC", "BriefDescription": "This event counts architecturally executed double-precision floating-point operation." }, { "ArchStdEvent": "ASE_FP_DP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD double-precision floating-point operation." }, { "ArchStdEvent": "SVE_FP_DP_SPEC", "BriefDescription": "This event counts architecturally executed SVE double-precision floating-point operation." }, { "ArchStdEvent": "ASE_SVE_FP_DP_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE double-precision floating-point operation." }, { "ArchStdEvent": "FP_DIV_SPEC", "BriefDescription": "This event counts architecturally executed floating-point divide operation." }, { "ArchStdEvent": "ASE_FP_DIV_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point divide operation." }, { "ArchStdEvent": "SVE_FP_DIV_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point divide operation." }, { "ArchStdEvent": "ASE_SVE_FP_DIV_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point divide operation." }, { "ArchStdEvent": "FP_SQRT_SPEC", "BriefDescription": "This event counts architecturally executed floating-point square root operation." }, { "ArchStdEvent": "ASE_FP_SQRT_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point square root operation." }, { "ArchStdEvent": "SVE_FP_SQRT_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point square root operation." }, { "ArchStdEvent": "ASE_SVE_FP_SQRT_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point square root operation." }, { "ArchStdEvent": "ASE_FP_FMA_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point FMA operation." }, { "ArchStdEvent": "SVE_FP_FMA_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point FMA operation." }, { "ArchStdEvent": "ASE_SVE_FP_FMA_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point FMA operation." }, { "ArchStdEvent": "FP_MUL_SPEC", "BriefDescription": "This event counts architecturally executed floating-point multiply operation." }, { "ArchStdEvent": "ASE_FP_MUL_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point multiply operation." }, { "ArchStdEvent": "SVE_FP_MUL_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point multiply operation." }, { "ArchStdEvent": "ASE_SVE_FP_MUL_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point multiply operation." }, { "ArchStdEvent": "FP_ADDSUB_SPEC", "BriefDescription": "This event counts architecturally executed floating-point add or subtract operation." }, { "ArchStdEvent": "ASE_FP_ADDSUB_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point add or subtract operation." }, { "ArchStdEvent": "SVE_FP_ADDSUB_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point add or subtract operation." }, { "ArchStdEvent": "ASE_SVE_FP_ADDSUB_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point add or subtract operation." }, { "ArchStdEvent": "ASE_FP_RECPE_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point reciprocal estimate operation." }, { "ArchStdEvent": "SVE_FP_RECPE_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point reciprocal estimate operation." }, { "ArchStdEvent": "ASE_SVE_FP_RECPE_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point reciprocal estimate operation." }, { "ArchStdEvent": "ASE_FP_CVT_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point convert operation." }, { "ArchStdEvent": "SVE_FP_CVT_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point convert operation." }, { "ArchStdEvent": "ASE_SVE_FP_CVT_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point convert operation." }, { "ArchStdEvent": "SVE_FP_AREDUCE_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point accumulating reduction operation." }, { "ArchStdEvent": "ASE_FP_PREDUCE_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point pairwise add step operation." }, { "ArchStdEvent": "SVE_FP_VREDUCE_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point vector reduction operation." }, { "ArchStdEvent": "ASE_SVE_FP_VREDUCE_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD or SVE floating-point vector reduction operation." }, { "ArchStdEvent": "FP_SCALE_OPS_SPEC", "BriefDescription": "This event counts architecturally executed SVE arithmetic operation. See FP_SCALE_OPS_SPEC of ARMv9 Reference Manual for more information. This event counter is incremented by (128 / CSIZE) and by twice that amount for operations that would also be counted by SVE_FP_FMA_SPEC." }, { "ArchStdEvent": "FP_FIXED_OPS_SPEC", "BriefDescription": "This event counts architecturally executed v8SIMD&FP arithmetic operation. See FP_FIXED_OPS_SPEC of ARMv9 Reference Manual for more information. This event counter is incremented by the specified number of elements for Advanced SIMD operations or by 1 for scalar operations, and by twice those amounts for operations that would also be counted by FP_FMA_SPEC." }, { "ArchStdEvent": "ASE_SVE_FP_DOT_SPEC", "BriefDescription": "This event counts architecturally executed microarchitectural Advanced SIMD or SVE floating-point dot-product operation." }, { "ArchStdEvent": "ASE_SVE_FP_MMLA_SPEC", "BriefDescription": "This event counts architecturally executed microarchitectural Advanced SIMD or SVE floating-point matrix multiply operation." }, { "ArchStdEvent": "ASE_FP_VREDUCE_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point vector reduction operation." }, { "ArchStdEvent": "SVE_FP_PREDUCE_SPEC", "BriefDescription": "This event counts architecturally executed SVE floating-point pairwise add step operation." }, { "ArchStdEvent": "ASE_FP_BF16_MIN_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing operations, smallest type is BFloat16 floating-point." }, { "ArchStdEvent": "ASE_FP_FP8_MIN_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing operations, smallest type is 8-bit floating-point." }, { "ArchStdEvent": "ASE_SVE_FP_BF16_MIN_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing or SVE data processing operations, smallest type is BFloat16 floating-point." }, { "ArchStdEvent": "ASE_SVE_FP_FP8_MIN_SPEC", "BriefDescription": "This event counts architecturally executed Advanced SIMD data processing or SVE data processing operations, smallest type is 8-bit floating-point." }, { "ArchStdEvent": "SVE_FP_BF16_MIN_SPEC", "BriefDescription": "This event counts architecturally executed SVE data processing operations, smallest type is BFloat16 floating-point." }, { "ArchStdEvent": "SVE_FP_FP8_MIN_SPEC", "BriefDescription": "This event counts architecturally executed SVE data processing operations, smallest type is 8-bit floating-point." }, { "ArchStdEvent": "FP_BF16_MIN_SPEC", "BriefDescription": "This event counts architecturally executed data processing operations, smallest type is BFloat16 floating-point." }, { "ArchStdEvent": "FP_FP8_MIN_SPEC", "BriefDescription": "This event counts architecturally executed data processing operations, smallest type is 8-bit floating-point." }, { "ArchStdEvent": "FP_BF16_FIXED_MIN_OPS_SPEC", "BriefDescription": "This event counts architecturally executed non-scalable element arithmetic operations, smallest type is BFloat16 floating-point." }, { "ArchStdEvent": "FP_FP8_FIXED_MIN_OPS_SPEC", "BriefDescription": "This event counts architecturally executed non-scalable element arithmetic operations, smallest type is 8-bit floating-point." }, { "ArchStdEvent": "FP_BF16_SCALE_MIN_OPS_SPEC", "BriefDescription": "This event counts architecturally executed scalable element arithmetic operations, smallest type is BFloat16 floating-point." }, { "ArchStdEvent": "FP_FP8_SCALE_MIN_OPS_SPEC", "BriefDescription": "This event counts architecturally executed scalable element arithmetic operations, smallest type is 8-bit floating-point." } ]