# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,sa8775p-dispcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Display Clock & Reset Controller on SA8775P maintainers: - Taniya Das description: | Qualcomm display clock control module provides the clocks, resets and power domains on SA8775P. See also: include/dt-bindings/clock/qcom,sa8775p-dispcc.h properties: compatible: enum: - qcom,sa8775p-dispcc0 - qcom,sa8775p-dispcc1 clocks: items: - description: GCC AHB clock source - description: Board XO source - description: Board XO_AO source - description: Sleep clock source - description: Link clock from DP0 PHY - description: VCO DIV clock from DP0 PHY - description: Link clock from DP1 PHY - description: VCO DIV clock from DP1 PHY - description: Byte clock from DSI0 PHY - description: Pixel clock from DSI0 PHY - description: Byte clock from DSI1 PHY - description: Pixel clock from DSI1 PHY power-domains: maxItems: 1 description: MMCX power domain required: - compatible - clocks - power-domains - '#power-domain-cells' allOf: - $ref: qcom,gcc.yaml# unevaluatedProperties: false examples: - | #include #include #include clock-controller@af00000 { compatible = "qcom,sa8775p-dispcc0"; reg = <0x0af00000 0x20000>; clocks = <&gcc GCC_DISP_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, <&dp_phy0 0>, <&dp_phy0 1>, <&dp_phy1 2>, <&dp_phy1 3>, <&dsi_phy0 0>, <&dsi_phy0 1>, <&dsi_phy1 2>, <&dsi_phy1 3>; power-domains = <&rpmhpd SA8775P_MMCX>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; }; ...