# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AXI ADC IP core maintainers: - Michael Hennerich description: | Analog Devices Generic AXI ADC IP core for interfacing an ADC device with a high speed serial (JESD204B/C) or source synchronous parallel interface (LVDS/CMOS). Usually, some other interface type (i.e SPI) is used as a control interface for the actual ADC, while this IP core will interface to the data-lines of the ADC and handle the streaming of data into memory via DMA. In some cases, the AXI ADC interface is used to perform specialized operation to a particular ADC, e.g access the physical bus through specific registers to write ADC registers. In this case, we use a different compatible which indicates the target IP core's name. The following IP is currently supported: - AXI AD7606x: specialized version of the IP core for all the chips from the ad7606 family. https://wiki.analog.com/resources/fpga/docs/axi_adc_ip https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html properties: compatible: enum: - adi,axi-adc-10.0.a - adi,axi-ad7606x - adi,axi-ad485x reg: maxItems: 1 clocks: maxItems: 1 dmas: maxItems: 1 dma-names: items: - const: rx adi,adc-dev: $ref: /schemas/types.yaml#/definitions/phandle description: A reference to a the actual ADC to which this FPGA ADC interfaces to. deprecated: true '#io-backend-cells': const: 0 '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "^adc@[0-9a-f]+$": type: object properties: reg: maxItems: 1 additionalProperties: true required: - compatible - reg required: - compatible - dmas - reg - clocks allOf: - if: properties: compatible: not: contains: const: adi,axi-ad7606x then: properties: '#address-cells': false '#size-cells': false patternProperties: "^adc@[0-9a-f]+$": false additionalProperties: false examples: - | adc@44a00000 { compatible = "adi,axi-adc-10.0.a"; reg = <0x44a00000 0x10000>; dmas = <&rx_dma 0>; dma-names = "rx"; clocks = <&axi_clk>; #io-backend-cells = <0>; }; - | #include parallel_bus_controller@44a00000 { compatible = "adi,axi-ad7606x"; reg = <0x44a00000 0x10000>; dmas = <&rx_dma 0>; dma-names = "rx"; clocks = <&ext_clk>; #address-cells = <1>; #size-cells = <0>; adc@0 { compatible = "adi,ad7606b"; reg = <0>; pwms = <&axi_pwm_gen 0 0>; pwm-names = "convst1"; avcc-supply = <&adc_vref>; vdrive-supply = <&vdd_supply>; reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>; standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>; adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH &gpio0 87 GPIO_ACTIVE_HIGH &gpio0 86 GPIO_ACTIVE_HIGH>; io-backends = <¶llel_bus_controller>; }; }; ...