# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/net/dsa/vitesse,vsc73xx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Vitesse VSC73xx DSA Switches maintainers: - Linus Walleij description: The Vitesse DSA Switches were produced in the early-to-mid 2000s. The Vitesse company has been acquired by Microsemi and Microsemi has been acquired Microchip but the new owner retains this vendor branding. The currently supported switch chips are Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch This switch can use one of two different management interfaces. If SPI interface is used, the device tree node is an SPI device so it must reside inside a SPI bus device tree node, see spi/spi-bus.txt When the chip is connected to a parallel memory bus and work in memory-mapped I/O mode, a platform device is used to represent the vsc73xx. In this case it must reside inside a platform bus device tree node. properties: compatible: enum: - vitesse,vsc7385 - vitesse,vsc7388 - vitesse,vsc7395 - vitesse,vsc7398 reg: maxItems: 1 gpio-controller: true "#gpio-cells": const: 2 reset-gpios: description: GPIO to be used to reset the whole device maxItems: 1 allOf: - $ref: dsa.yaml#/$defs/ethernet-ports patternProperties: "^(ethernet-)?ports$": additionalProperties: true patternProperties: "^(ethernet-)?port@6$": allOf: - if: properties: phy-mode: contains: enum: - rgmii then: properties: rx-internal-delay-ps: $ref: "#/$defs/internal-delay-ps" tx-internal-delay-ps: $ref: "#/$defs/internal-delay-ps" # This checks if reg is a chipselect so the device is on an SPI # bus, the if-clause will fail if reg is a tuple such as for a # platform device. if: properties: reg: minimum: 0 maximum: 256 then: $ref: /schemas/spi/spi-peripheral-props.yaml# required: - compatible - reg $defs: internal-delay-ps: description: Disable tunable delay lines using 0 ps, or enable them and select the phase between 1400 ps and 2000 ps in increments of 300 ps. default: 2000 enum: [0, 1400, 1700, 2000] unevaluatedProperties: false examples: - | #include spi { #address-cells = <1>; #size-cells = <0>; ethernet-switch@0 { compatible = "vitesse,vsc7395"; reg = <0>; spi-max-frequency = <2500000>; gpio-controller; #gpio-cells = <2>; ethernet-ports { #address-cells = <1>; #size-cells = <0>; ethernet-port@0 { reg = <0>; label = "lan1"; }; ethernet-port@1 { reg = <1>; label = "lan2"; }; ethernet-port@2 { reg = <2>; label = "lan3"; }; ethernet-port@3 { reg = <3>; label = "lan4"; }; ethernet-port@6 { reg = <6>; ethernet = <&gmac1>; phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; fixed-link { speed = <1000>; full-duplex; pause; }; }; }; }; }; bus { #address-cells = <1>; #size-cells = <1>; ethernet-switch@10000000 { compatible = "vitesse,vsc7385"; reg = <0x10000000 0x20000>; reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; ethernet-ports { #address-cells = <1>; #size-cells = <0>; ethernet-port@0 { reg = <0>; label = "lan1"; }; ethernet-port@1 { reg = <1>; label = "lan2"; }; ethernet-port@2 { reg = <2>; label = "lan3"; }; ethernet-port@3 { reg = <3>; label = "lan4"; }; ethernet-port@6 { reg = <6>; ethernet = <&enet0>; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; phy-mode = "rgmii"; fixed-link { speed = <1000>; full-duplex; pause; }; }; }; }; };