// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2023 Arm Ltd.
 */

/dts-v1/;

#include "sun50i-h616.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/leds/common.h>

/ {
	model = "OrangePi Zero 2W";
	compatible = "xunlong,orangepi-zero2w", "allwinner,sun50i-h618";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
		};
	};

	reg_vcc5v: vcc5v {
		/* board wide 5V supply directly from the USB-C socket */
		compatible = "regulator-fixed";
		regulator-name = "vcc-5v";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	reg_vcc3v3: vcc3v3 {
		/* SY8089 DC/DC converter */
		compatible = "regulator-fixed";
		regulator-name = "vcc-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&reg_vcc5v>;
		regulator-always-on;
	};
};

&codec {
	allwinner,audio-routing = "Line Out", "LINEOUT";
	status = "okay";
};

&cpu0 {
	cpu-supply = <&reg_dcdc2>;
};

&ehci1 {
	status = "okay";
};

/* USB 2 & 3 are on the FPC connector (or the exansion board) */

&mmc0 {
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
	bus-width = <4>;
	vmmc-supply = <&reg_vcc3v3>;
	status = "okay";
};

&ohci1 {
	status = "okay";
};

&pio {
	vcc-pc-supply = <&reg_dldo1>;
	vcc-pf-supply = <&reg_dldo1>;	/* internally via VCC-IO */
	vcc-pg-supply = <&reg_aldo1>;
	vcc-ph-supply = <&reg_dldo1>;	/* internally via VCC-IO */
	vcc-pi-supply = <&reg_dldo1>;
};

&r_i2c {
	status = "okay";

	axp313: pmic@36 {
		compatible = "x-powers,axp313a";
		reg = <0x36>;
		#interrupt-cells = <1>;
		interrupt-controller;
		interrupt-parent = <&pio>;
		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 */

		vin1-supply = <&reg_vcc5v>;
		vin2-supply = <&reg_vcc5v>;
		vin3-supply = <&reg_vcc5v>;

		regulators {
			/* Supplies VCC-PLL and DRAM */
			reg_aldo1: aldo1 {
				regulator-always-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc1v8";
			};

			/* Supplies VCC-IO, so needs to be always on. */
			reg_dldo1: dldo1 {
				regulator-always-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc3v3";
			};

			reg_dcdc1: dcdc1 {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <990000>;
				regulator-name = "vdd-gpu-sys";
			};

			reg_dcdc2: dcdc2 {
				regulator-always-on;
				regulator-min-microvolt = <810000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-cpu";
			};

			reg_dcdc3: dcdc3 {
				regulator-always-on;
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
				regulator-name = "vdd-dram";
			};
		};
	};
};

&spi0  {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_ph_pins>;
	status = "okay";
};

&usbotg {
	/*
	 * PHY0 pins are connected to a USB-C socket, but a role switch
	 * is not implemented: both CC pins are pulled to GND.
	 * The VBUS pins power the device, so a fixed peripheral mode
	 * is the best choice.
	 * The board can be powered via GPIOs, in this case port0 *can*
	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
	 * then provided by the GPIOs. Any user of this setup would
	 * need to adjust the DT accordingly: dr_mode set to "host",
	 * enabling OHCI0 and EHCI0.
	 */
	dr_mode = "peripheral";
	status = "okay";
};

&usbphy {
	usb1_vbus-supply = <&reg_vcc5v>;
	status = "okay";
};