// SPDX-License-Identifier: GPL-2.0+ OR MIT /* * Devices used on die 0 on the Apple T6022 "M2 Ultra" SoC and present on * Apple T6020 / T6021 "M2 Pro" / "M2 Max". * * Copyright The Asahi Linux Contributors */ nco: clock-controller@28e03c000 { compatible = "apple,t6020-nco", "apple,t8103-nco"; reg = <0x2 0x8e03c000 0x0 0x14000>; clocks = <&nco_clkref>; #clock-cells = <1>; }; aic: interrupt-controller@28e100000 { compatible = "apple,t6020-aic", "apple,aic2"; #interrupt-cells = <4>; interrupt-controller; reg = <0x2 0x8e100000 0x0 0xc000>, <0x2 0x8e10c000 0x0 0x1000>; reg-names = "core", "event"; power-domains = <&ps_aic>; }; nub_spmi0: spmi@29e114000 { compatible = "apple,t6020-spmi", "apple,t8103-spmi"; reg = <0x2 0x9e114000 0x0 0x100>; #address-cells = <2>; #size-cells = <0>; pmic1: pmic@f { compatible = "apple,maverick-pmic", "apple,spmi-nvmem"; reg = <0xb SPMI_USID>; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; pm_setting: pm-setting@1405 { reg = <0x1405 0x1>; }; rtc_offset: rtc-offset@1411 { reg = <0x1411 0x6>; }; boot_stage: boot-stage@6001 { reg = <0x6001 0x1>; }; boot_error_count: boot-error-count@6002,0 { reg = <0x6002 0x1>; bits = <0 4>; }; panic_count: panic-count@6002,4 { reg = <0x6002 0x1>; bits = <4 4>; }; boot_error_stage: boot-error-stage@6003 { reg = <0x6003 0x1>; }; shutdown_flag: shutdown-flag@600f,3 { reg = <0x600f 0x1>; bits = <3 1>; }; fault_shadow: fault-shadow@867b { reg = <0x867b 0x10>; }; socd: socd@8b00 { reg = <0x8b00 0x400>; }; }; }; }; wdt: watchdog@29e2c4000 { compatible = "apple,t6020-wdt", "apple,t8103-wdt"; reg = <0x2 0x9e2c4000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; }; smc_mbox: mbox@2a2408000 { compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4"; reg = <0x2 0xa2408000 0x0 0x4000>; interrupt-parent = <&aic>; interrupts = , , , ; interrupt-names = "send-empty", "send-not-empty", "recv-empty", "recv-not-empty"; #mbox-cells = <0>; }; smc: smc@2a2400000 { compatible = "apple,t6020-smc", "apple,t8103-smc"; reg = <0x2 0xa2400000 0x0 0x4000>, <0x2 0xa3e00000 0x0 0x100000>; reg-names = "smc", "sram"; mboxes = <&smc_mbox>; smc_gpio: gpio { compatible = "apple,smc-gpio"; gpio-controller; #gpio-cells = <2>; }; smc_reboot: reboot { compatible = "apple,smc-reboot"; nvmem-cells = <&shutdown_flag>, <&boot_stage>, <&boot_error_count>, <&panic_count>; nvmem-cell-names = "shutdown_flag", "boot_stage", "boot_error_count", "panic_count"; }; }; pinctrl_smc: pinctrl@2a2820000 { compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl"; reg = <0x2 0xa2820000 0x0 0x4000>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl_smc 0 0 30>; apple,npins = <30>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&aic>; interrupts = , , , , , , ; }; sio_dart: iommu@39b008000 { compatible = "apple,t6020-dart", "apple,t8110-dart"; reg = <0x3 0x9b008000 0x0 0x8000>; interrupt-parent = <&aic>; interrupts = ; #iommu-cells = <1>; power-domains = <&ps_sio_cpu>; }; fpwm0: pwm@39b030000 { compatible = "apple,t6020-fpwm", "apple,s5l-fpwm"; reg = <0x3 0x9b030000 0x0 0x4000>; power-domains = <&ps_fpwm0>; clocks = <&clkref>; #pwm-cells = <2>; status = "disabled"; }; i2c0: i2c@39b040000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b040000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c0_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c0>; #address-cells = <0x1>; #size-cells = <0x0>; }; i2c1: i2c@39b044000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b044000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c1_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c1>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c2: i2c@39b048000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b048000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c2_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c2>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c3: i2c@39b04c000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b04c000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c3>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c4: i2c@39b050000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b050000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c4_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c4>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c5: i2c@39b054000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b054000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c5_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c5>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c6: i2c@39b054000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b054000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c6_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c6>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c7: i2c@39b054000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b054000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c7_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c7>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; i2c8: i2c@39b054000 { compatible = "apple,t6020-i2c", "apple,t8103-i2c"; reg = <0x3 0x9b054000 0x0 0x4000>; clocks = <&clkref>; interrupt-parent = <&aic>; interrupts = ; pinctrl-0 = <&i2c8_pins>; pinctrl-names = "default"; power-domains = <&ps_i2c8>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; }; spi1: spi@39b104000 { compatible = "apple,t6020-spi", "apple,t8103-spi"; reg = <0x3 0x9b104000 0x0 0x4000>; interrupt-parent = <&aic>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&clk_200m>; pinctrl-0 = <&spi1_pins>; pinctrl-names = "default"; power-domains = <&ps_spi1>; status = "disabled"; }; spi2: spi@39b108000 { compatible = "apple,t6020-spi", "apple,t8103-spi"; reg = <0x3 0x9b108000 0x0 0x4000>; interrupt-parent = <&aic>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&clkref>; pinctrl-0 = <&spi2_pins>; pinctrl-names = "default"; power-domains = <&ps_spi2>; status = "disabled"; }; spi4: spi@39b110000 { compatible = "apple,t6020-spi", "apple,t8103-spi"; reg = <0x3 0x9b110000 0x0 0x4000>; interrupt-parent = <&aic>; interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&clkref>; pinctrl-0 = <&spi4_pins>; pinctrl-names = "default"; power-domains = <&ps_spi4>; status = "disabled"; }; serial0: serial@39b200000 { compatible = "apple,s5l-uart"; reg = <0x3 0x9b200000 0x0 0x4000>; reg-io-width = <4>; interrupt-parent = <&aic>; interrupts = ; /* * TODO: figure out the clocking properly, there may * be a third selectable clock. */ clocks = <&clkref>, <&clkref>; clock-names = "uart", "clk_uart_baud0"; power-domains = <&ps_uart0>; status = "disabled"; }; admac: dma-controller@39b400000 { compatible = "apple,t6020-admac", "apple,t8103-admac"; reg = <0x3 0x9b400000 0x0 0x34000>; #dma-cells = <1>; dma-channels = <16>; interrupts-extended = <0>, <&aic AIC_IRQ 0 1218 IRQ_TYPE_LEVEL_HIGH>, <0>, <0>; iommus = <&sio_dart 2>; power-domains = <&ps_sio_adma>; resets = <&ps_audio_p>; }; mca: mca@39b600000 { compatible = "apple,t6020-mca", "apple,t8103-mca"; reg = <0x3 0x9b600000 0x0 0x10000>, <0x3 0x9b500000 0x0 0x20000>; clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; dma-names = "tx0a", "rx0a", "tx0b", "rx0b", "tx1a", "rx1a", "tx1b", "rx1b", "tx2a", "rx2a", "tx2b", "rx2b", "tx3a", "rx3a", "tx3b", "rx3b"; interrupt-parent = <&aic>; interrupts = , , , ; power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, <&ps_mca2>, <&ps_mca3>; resets = <&ps_audio_p>; #sound-dai-cells = <1>; }; gpu: gpu@406400000 { compatible = "apple,agx-g14s"; reg = <0x4 0x6400000 0 0x40000>, <0x4 0x4000000 0 0x1000000>; reg-names = "asc", "sgx"; mboxes = <&agx_mbox>; power-domains = <&ps_gfx>; memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, <&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>; memory-region-names = "ttbs", "pagetables", "handoff", "hw-cal-a", "hw-cal-b", "globals"; apple,firmware-abi = <0 0 0>; }; agx_mbox: mbox@406408000 { compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4"; reg = <0x4 0x6408000 0x0 0x4000>; interrupt-parent = <&aic>; interrupts = , , , ; interrupt-names = "send-empty", "send-not-empty", "recv-empty", "recv-not-empty"; #mbox-cells = <0>; }; pcie0: pcie@580000000 { compatible = "apple,t6020-pcie"; device_type = "pci"; reg = <0x5 0x80000000 0x0 0x1000000>, /* config */ <0x5 0x91000000 0x0 0x4000>, /* rc */ <0x5 0x94008000 0x0 0x4000>, /* port0 */ <0x5 0x95008000 0x0 0x4000>, /* port1 */ <0x5 0x96008000 0x0 0x4000>, /* port2 */ <0x5 0x97008000 0x0 0x4000>, /* port3 */ <0x5 0x9e00c000 0x0 0x4000>, /* phy0 */ <0x5 0x9e010000 0x0 0x4000>, /* phy1 */ <0x5 0x9e014000 0x0 0x4000>, /* phy2 */ <0x5 0x9e018000 0x0 0x4000>; /* phy3 */ reg-names = "config", "rc", "port0", "port1", "port2", "port3", "phy0", "phy1", "phy2", "phy3"; interrupt-parent = <&aic>; interrupts = , , , ; msi-controller; msi-parent = <&pcie0>; msi-ranges = <&aic AIC_IRQ 0 1672 IRQ_TYPE_EDGE_RISING 32>; iommu-map = <0x100 &pcie0_dart_0 1 1>, <0x200 &pcie0_dart_1 1 1>, <0x300 &pcie0_dart_2 1 1>, <0x400 &pcie0_dart_3 1 1>; iommu-map-mask = <0xff00>; bus-range = <0 4>; #address-cells = <3>; #size-cells = <2>; ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; power-domains = <&ps_apcie_gp_sys>; pinctrl-0 = <&pcie_pins>; pinctrl-names = "default"; port00: pci@0,0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>; #address-cells = <3>; #size-cells = <2>; ranges; interrupt-controller; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &port00 0 0 0 0>, <0 0 0 2 &port00 0 0 0 1>, <0 0 0 3 &port00 0 0 0 2>, <0 0 0 4 &port00 0 0 0 3>; }; port01: pci@1,0 { device_type = "pci"; reg = <0x800 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>; #address-cells = <3>; #size-cells = <2>; ranges; interrupt-controller; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &port01 0 0 0 0>, <0 0 0 2 &port01 0 0 0 1>, <0 0 0 3 &port01 0 0 0 2>, <0 0 0 4 &port01 0 0 0 3>; status = "disabled"; }; port02: pci@2,0 { device_type = "pci"; reg = <0x1000 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>; #address-cells = <3>; #size-cells = <2>; ranges; interrupt-controller; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &port02 0 0 0 0>, <0 0 0 2 &port02 0 0 0 1>, <0 0 0 3 &port02 0 0 0 2>, <0 0 0 4 &port02 0 0 0 3>; status = "disabled"; }; port03: pci@3,0 { device_type = "pci"; reg = <0x1800 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>; #address-cells = <3>; #size-cells = <2>; ranges; interrupt-controller; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &port03 0 0 0 0>, <0 0 0 2 &port03 0 0 0 1>, <0 0 0 3 &port03 0 0 0 2>, <0 0 0 4 &port03 0 0 0 3>; status = "disabled"; }; }; pcie0_dart_0: iommu@594000000 { compatible = "apple,t6020-dart", "apple,t8110-dart"; reg = <0x5 0x94000000 0x0 0x4000>; #iommu-cells = <1>; interrupt-parent = <&aic>; interrupts = ; power-domains = <&ps_apcie_gp_sys>; }; pcie0_dart_1: iommu@595000000 { compatible = "apple,t6020-dart", "apple,t8110-dart"; reg = <0x5 0x95000000 0x0 0x4000>; #iommu-cells = <1>; interrupt-parent = <&aic>; interrupts = ; power-domains = <&ps_apcie_gp_sys>; status = "disabled"; }; pcie0_dart_2: iommu@596000000 { compatible = "apple,t6020-dart", "apple,t8110-dart"; reg = <0x5 0x96000000 0x0 0x4000>; #iommu-cells = <1>; interrupt-parent = <&aic>; interrupts = ; power-domains = <&ps_apcie_gp_sys>; status = "disabled"; }; pcie0_dart_3: iommu@597000000 { compatible = "apple,t6020-dart", "apple,t8110-dart"; reg = <0x5 0x97000000 0x0 0x4000>; #iommu-cells = <1>; interrupt-parent = <&aic>; interrupts = ; power-domains = <&ps_apcie_gp_sys>; status = "disabled"; };