// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-j7200-som-p0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy.h>

#include "k3-serdes.h"

/ {
	compatible = "ti,j7200-evm", "ti,j7200";
	model = "Texas Instruments J7200 EVM";

	aliases {
		serial0 = &wkup_uart0;
		serial1 = &mcu_uart0;
		serial2 = &main_uart0;
		serial3 = &main_uart1;
		serial5 = &main_uart3;
		mmc0 = &main_sdhci0;
		mmc1 = &main_sdhci1;
	};

	chosen {
		stdout-path = "serial2:115200n8";
	};

	evm_12v0: fixedregulator-evm12v0 {
		/* main supply */
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_3v3: fixedregulator-vsys3v3 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_5v0: fixedregulator-vsys5v0 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vdd_mmc1: fixedregulator-sd {
		/* Output of TPS22918 */
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		vin-supply = <&vsys_3v3>;
		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
	};

	vdd_sd_dv: gpio-regulator-TLV71033 {
		/* Output of TLV71033 */
		compatible = "regulator-gpio";
		regulator-name = "tlv71033";
		pinctrl-names = "default";
		pinctrl-0 = <&vdd_sd_dv_pins_default>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		vin-supply = <&vsys_5v0>;
		gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x0>,
			 <3300000 0x1>;
	};

	transceiver1: can-phy1 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
		standby-gpios = <&wkup_gpio0 58 GPIO_ACTIVE_LOW>;
		enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
	};

	transceiver2: can-phy2 {
		compatible = "ti,tcan1042";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
		standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
	};

	transceiver3: can-phy3 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
		standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>;
		enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
		mux-states = <&mux0 1>;
	};
};

&wkup_pmx0 {
};

&wkup_pmx2 {
	mcu_uart0_pins_default: mcu-uart0-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x90, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */
			J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
			J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
			J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
		>;
		bootph-all;
	};

	wkup_uart0_pins_default: wkup-uart0-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
			J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
		>;
		bootph-all;
	};

	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
			J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
			J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
			J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
			J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
			J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
			J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
			J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
			J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
			J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
			J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
		>;
	};

	wkup_gpio_pins_default: wkup-gpio-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x70, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
		>;
	};

	mcu_mdio_pins_default: mcu-mdio1-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};

	mcu_mcan0_pins_default: mcu-mcan0-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x54, PIN_INPUT, 0) /* (A17) MCU_MCAN0_RX */
			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (A16) MCU_MCAN0_TX */
		>;
	};

	mcu_mcan1_pins_default: mcu-mcan1-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x6c, PIN_INPUT, 0) /* (B16) WKUP_GPIO0_5.MCU_MCAN1_RX */
			J721E_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (D13) WKUP_GPIO0_4.MCU_MCAN1_TX */
		>;
	};

	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x58, PIN_INPUT, 7) /* (B18) WKUP_GPIO0_0 */
			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 7) /* (B17) MCU_SPI0_D1 */
		>;
	};

	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x60, PIN_INPUT, 7) /* (D14) WKUP_GPIO0_2 */
		>;
	};
};

&main_pmx0 {
	main_uart0_pins_default: main-uart0-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
			J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
			J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
			J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
		>;
		bootph-all;
	};

	main_uart1_pins_default: main-uart1-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
			J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
		>;
	};

	main_uart3_pins_default: main-uart3-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
			J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
		>;
	};

	main_i2c1_pins_default: main-i2c1-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
			J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
		>;
	};

	main_mmc1_pins_default: main-mmc1-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
			J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
			J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
			J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
			J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
			J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
			J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
			J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
		>;
		bootph-all;
	};

	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
		>;
	};

	main_mcan3_pins_default: main-mcan3-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
			J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
		>;
	};
};

&main_pmx2 {
	main_usbss0_pins_default: main-usbss0-default-pins {
		pinctrl-single,pins = <
			J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
		>;
		bootph-all;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "reserved";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_uart0_pins_default>;
	bootph-all;
};

&mcu_uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_uart0_pins_default>;
	bootph-all;
};

&main_uart0 {
	status = "okay";
	/* Shared with ATF on this platform */
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	bootph-all;
};

&main_uart1 {
	status = "okay";
	/* Default pinmux */
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart1_pins_default>;
};

&main_uart2 {
	/* MAIN UART 2 is used by R5F firmware */
	status = "reserved";
};

&main_uart3 {
	/* Shared with MCAN Interface */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart3_pins_default>;
};

&main_gpio0 {
	status = "okay";
};

&wkup_gpio0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_gpio_pins_default>;
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
};

&davinci_mdio {
	phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	exp1: gpio@20 {
		compatible = "ti,tca6416";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	exp2: gpio@22 {
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

/*
 * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
 * swapped on the CPB.
 *
 * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
 * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
 */
&main_i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;

	exp3: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
				  "UB926_LOCK", "UB926_PWR_SW_CNTRL",
				  "UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
	};
};

&main_sdhci0 {
	/* eMMC */
	status = "okay";
	non-removable;
	bootph-all;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&main_sdhci1 {
	/* SD card */
	status = "okay";
	pinctrl-0 = <&main_mmc1_pins_default>;
	pinctrl-names = "default";
	vmmc-supply = <&vdd_mmc1>;
	vqmmc-supply = <&vdd_sd_dv>;
	bootph-all;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&serdes_ln_ctrl {
	idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
		      <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
};

&usb_serdes_mux {
	idle-states = <1>; /* USB0 to SERDES lane 3 */
	bootph-all;
};

&usbss0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_usbss0_pins_default>;
	bootph-all;
	ti,vbus-divider;
	ti,usb2-only;
};

&usb0 {
	dr_mode = "otg";
	maximum-speed = "high-speed";
	bootph-all;
};

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes_refclk {
	clock-frequency = <100000000>;
};

&serdes0 {
	serdes0_pcie_link: phy@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
	};

	serdes0_qsgmii_link: phy@1 {
		reg = <2>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_QSGMII>;
		resets = <&serdes_wiz0 3>;
	};
};

&pcie1_rc {
	status = "okay";
	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie-phy";
	num-lanes = <2>;
};

&mcu_mcan0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan0_pins_default>;
	phys = <&transceiver1>;
};

&mcu_mcan1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan1_pins_default>;
	phys = <&transceiver2>;
};

&main_mcan3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan3_pins_default>;
	phys = <&transceiver3>;
};