// SPDX-License-Identifier: GPL-2.0-only OR MIT
/**
 * Device Tree Source for enabling IPC using TI SDK firmware on J722S SoCs
 *
 * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
 */

&reserved_memory {
	mcu_r5fss0_core0_dma_memory_region: memory@a1000000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa1000000 0x00 0x100000>;
		no-map;
	};

	mcu_r5fss0_core0_memory_region: memory@a1100000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa1100000 0x00 0xf00000>;
		no-map;
	};

	main_r5fss0_core0_dma_memory_region: memory@a2000000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa2000000 0x00 0x100000>;
		no-map;
	};

	main_r5fss0_core0_memory_region: memory@a2100000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa2100000 0x00 0xf00000>;
		no-map;
	};

	c7x_0_dma_memory_region: memory@a3000000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa3000000 0x00 0x100000>;
		no-map;
	};

	c7x_0_memory_region: memory@a3100000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa3100000 0x00 0xf00000>;
		no-map;
	};

	c7x_1_dma_memory_region: memory@a4000000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa4000000 0x00 0x100000>;
		no-map;
	};

	c7x_1_memory_region: memory@a4100000 {
		compatible = "shared-dma-pool";
		reg = <0x00 0xa4100000 0x00 0xf00000>;
		no-map;
	};

	rtos_ipc_memory_region: memory@a5000000 {
		reg = <0x00 0xa5000000 0x00 0x1c00000>;
		alignment = <0x1000>;
		no-map;
	};
};

&mailbox0_cluster0 {
	status = "okay";

	mbox_wkup_r5_0: mbox-wkup-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster1 {
	status = "okay";

	mbox_mcu_r5_0: mbox-mcu-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "okay";

	mbox_c7x_0: mbox-c7x-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster3 {
	status = "okay";

	mbox_main_r5_0: mbox-main-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_c7x_1: mbox-c7x-1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

/* Timers are used by Remoteproc firmware */
&main_timer0 {
	status = "reserved";
};

&main_timer1 {
	status = "reserved";
};

&main_timer2 {
	status = "reserved";
};

&wkup_r5fss0 {
	status = "okay";
};

&wkup_r5fss0_core0 {
	mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
	memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
			<&wkup_r5fss0_core0_memory_region>;
	status = "okay";
};

&mcu_r5fss0 {
	status = "okay";
};

&mcu_r5fss0_core0 {
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	status = "okay";
};

&main_r5fss0 {
	status = "okay";
};

&main_r5fss0_core0 {
	mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
	memory-region = <&main_r5fss0_core0_dma_memory_region>,
			<&main_r5fss0_core0_memory_region>;
	status = "okay";
};

&c7x_0 {
	mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
	memory-region = <&c7x_0_dma_memory_region>,
			<&c7x_0_memory_region>;
	status = "okay";
};

&c7x_1 {
	mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
	memory-region = <&c7x_1_dma_memory_region>,
			<&c7x_1_memory_region>;
	status = "okay";
};