ELF>8@@76H9u&eHHHH9tHH@HDff.HHHeH=H 0H1ҿHHHHH HeHH 01HƿHff.HFHtWHtH@@@OeH;=u6/t,wj@ HtJOeH;=tU1t`vtۍPn@@묋؋HIHH 돸Hw6HHuf@@OeH;=t;1Hu:H@@@OeH;=u1@@@OeH;=t1H@u&@@OeH;=t1ff.@HHH H9r+HH8rH ȹ HH 0+101Ҿ1Hƿ @eHH9teH=HHH 0H1ҿHfHt%Hu5t HuS#2H HH &tNtCt?Hڹ#H 0[H1ҿ#5H1ҿ#[HHUSwte[]1ۃtHڹ#H 04#2H H H H9tȐ 1H#H9t1H޿#뻹#2HH H :H됹#2HH H HtH1ҿ#H\H1ҿ#HDS@t[H[fDSH]HwsH HtQ-Hw@>=u5H uWvvv H[=uHHHHHH9tHHHHDI11HHG=HHt @HHtHt!HtHH HtHug1O1ff.=t!=t=t"HH<$0=H<$t=t HHHtKHt9HtHHjH1t uhtBwuH@ @uH@H<HH <AvBv1w9H@ H@H@HS ff.fHH0r=t-HHHeHH 0=uc1HƿHfHH@t=HH+r=t9HHHHHHHHf.HHĀt!HHHHHfAWAVAUATUSHHHVk=HIILEHH#svHIH#raHIH!rLHH,sHH-r=Iu HIH$HLDHIt.HIH1rHH-HLDHIH3HLEwH IHLEHHHH6HHEHH:rpAUIHAVHAWHATHH H[]A\A]A^A_wHIhI\HL $HL $mHHL $HHODIHHHH[]A\A]A^A_HHH,fHHשt!HHHHHHHשt;HH=rHHHHHHHff.fHHש HH4HuMHu3HHHHHt HHHHHHHHHש@tqHHtHtDHu\HHHHHHHHHHHH@HHשtHHHHDHHשt!HHHHHHHשHtZtZHH HuP4HHHuHHHHHHHHHHHHfDHHשPwLt u_T5HVHHFHHHHHHHHHHHHHH sBH u!HHHHHHHfDHHש@t!HHHHHHHH"s!HHHHH=tH GPLGPLGPLGPLGPLGPLGPLGPLGPLGPLeH1ff.HH"rut@t-HH2r u$   DHuu=tHu HH2r u9  Hu=t1u딐 ff.@H@HH+r tqHHH H D‰HH2r u=  =u t1 ff.HtHtuHH@HHH2H@u*H tH t 1Ҩ ƒ=u t1HH+fHH2rt  5IHHAff.fHttSHHtrHu1[HHt(HHu111[H@ttSHHtrHu1[HHt(HHu111[HttSHHtrHu1[HHt(HHu111[Ht^HH"sISHHu1[;ou{nu{u1[1ff.@Ht*HtH1?ounuu 1f.Ht`H@tKSHHu1[HHu1[1ff.fHtSHHu1[;ou{nu{u1[HHu1[HH럸ff.HSHHHu1[HHt!HHu11HHt(HHu&111lHHS1D[f.HSHHt%HHu$1[1[HHtHHuHHu HHuff.fHUHS,HHHtDHHHuHHu7HHu-HHu51[]HHu5HHHu1[]HHu HHu HHtDHHu@Hut  @1HHD=uMt8HH+s6HHH@HHH eH01HƿHf.AWAVAUATUSH eH%(HD$1H2H H HHHHHĀHHHD$HD$ D$HHHH:rHH;>D$HD$HD$ @Ņ vHH:HH5 w*H* TtHHHHHHOHH;sP@tKHH1HHHH11H{HW==^=$J=X  t& HHHHHH=e ZHH2srD-EuHtD%EuH@t=H-HMH@ H HvHH" HtV tHH+HHH4t&HtHHHHH DEH<=c=J:Q HH*HH:r  & =_HH.rt @ @HH3rt  H= \=H HHH:N7HT$H1HLcMEyAVLLH|$HHg IIIMA9uH1ҿHHHHHHD$HD$ D$ HHt HH@H#HHD$eH+%(WH H[]A\A]A^A_` H4HBjHT$H1HŸIIM$9HH I$HD$eH+%(H []A\A]A^A_H4Hlx!u #2H H H tH4tH]D5E HH"! HLcHcHH8tLHIA$KH HHuH;HHH8 Hu {  HHH,r5  HH>j A LHHHH>]E1HH=HH= HH#MHH4HH3rDE  HHVHH-rD E HHt%HH:s<D< <H Au H9-9HH4HHH.r5t @ @HH/r t H<3< +H A(HHH1rDEt  HUHH,sHH-HH"HHHHH eH0HH#rt  k1YHH-r  HH,r  HyH!-%H=+,=׾ )HT$H1HŸkIII$9zHH5I$̋HH4H"HH4HH"HH4HH4uHA1wB7Ht'tHH9s =A=A(HH6r= @ @H3HHH4Ht$HHy/HH rHH4sH@DH tHH:C HCHHH$D=E H3LHHsHt$HHK HH*r ;  onH4HiLHHOLHH) j  H9r =u~  H'H /   t     a y A1  |arch/x86/kernel/cpu/bugs.cofffullfull,nosmtforcevmexitflush,nowarnflushflush,nosmtfull,forcemicrocodesafe-retibpbibpb-vmexitautounretstuffnosmtMitigation: IBRSMitigation: Enhanced IBRSMitigation: Stuffingalways-onconditionalUser space: VulnerableMitigation: IBPBVulnerable: No microcodeMitigation: Safe RET6Spectre V1 : %s nospectre_v2spectre_v26Spectre V2 : %s 6RETBleed: %s spectre_v2_usernospec_store_bypass_disablespec_store_bypass_disable6MDS: %s 6TAA: %s 6MMIO Stale Data: %s 6SRBDS: %s 6GDS: %s Not affected Mitigation: PTI Vulnerable %s - vulnerable module loaded; BHI: Not affected; BHI: BHI_DIS_S; BHI: SW loop, KVM: SW loop; BHI: Retpoline; BHI: Vulnerable; PBRSB-eIBRS: Not affected; PBRSB-eIBRS: SW sequence; PBRSB-eIBRS: Vulnerable; RSB filling; STIBP: forced; STIBP: disabled; STIBP: always-on; STIBP: conditional; IBRS_FW; IBPB: always-on; IBPB: conditional; IBPB: disabledVulnerable: LFENCE %s%s%s%s%s%s%s%s Mitigation: PTE Inversionvulnerablemitigateddisabled%s; SMT Host state unknown %s; SMT %s Processor vulnerable Unknown: No mitigations Vulnerableenabled with STIBP protectionMitigation: SMT disabled onprctlseccompretpolineretpoline,amdretpoline,lfenceretpoline,genericeibrseibrs,lfenceeibrs,retpolineibrsMitigation: RetpolinesMitigation: LFENCEprctl,ibpbseccomp,ibpbMitigation: MicrocodeMitigation: TSX disabledMitigation: Clear CPU buffers  g    t u  X ] g P Q K h    B   T   ] G X ?  @   F  U  !  C  h  % uuuuuu_u03Spectre V2 : Ignoring unknown spectre_bhi option (%s)3Speculative Return Stack Overflow: Ignoring unknown SRSO option (%s).3RETBleed: Ignoring unknown retbleed option (%s).User space: Mitigation: STIBP always-on protectionUser space: Mitigation: STIBP protectionVulnerable: Safe RET, no microcodeUnknown: Dependent on hypervisor status3Spectre V2 : unknown option (%s). Switching to default mode 3Spectre V2 : %s selected but CPU doesn't have Enhanced or Automatic IBRS. Switching to AUTO select 3Spectre V2 : %s selected, but CPU doesn't have a serializing LFENCE. Switching to AUTO select 3Spectre V2 : %s selected but not Intel CPU. Switching to AUTO select 3Spectre V2 : %s selected but CPU doesn't have IBRS. Switching to AUTO select 6Spectre V2 : %s selected on command line. 3Spectre V2 : WARNING: LFENCE mitigation is not recommended for this CPU, data leaks possible! 4Spectre V2 : WARNING: IBRS mitigation selected on Enhanced IBRS CPU, this may cause unnecessary performance loss 6Spectre V2 : Spectre BHI mitigation: SW BHB clearing on VM exit only 6Spectre V2 : Spectre BHI mitigation: SW BHB clearing on syscall and VM exit 6Spectre V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch 6Spectre V2 : Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT 6Spectre V2 : Spectre v2 / SpectreRSB : Filling RSB on VMEXIT 6Spectre V2 : Enabling Speculation Barrier for firmware calls 6Spectre V2 : Enabling Restricted Speculation for firmware calls 3RETBleed: WARNING: CPU does not support IBPB. 3RETBleed: WARNING: retbleed=stuff depends on spectre_v2=retpoline 3RETBleed: WARNING: BTB untrained return thunk mitigation is only effective on AMD/Hygon! 3RETBleed: WARNING: Spectre v2 mitigation leaves CPU vulnerable to RETBleed attacks, data leaks possible! 6Spectre V2 : spectre_v2_user=%s forced on command line. 3Spectre V2 : Unknown user space protection option (%s). Switching to AUTO select 6Spectre V2 : mitigation: Enabling %s Indirect Branch Prediction Barrier 6Spectre V2 : Selecting STIBP always-on mode to complement retbleed mitigation 3Speculative Store Bypass: unknown option (%s). Switching to default mode 6Speculative Store Bypass: %s 4L1TF: System has more than MAX_PA/2 memory. L1TF mitigation not effective. 6L1TF: You may make it effective by booting the kernel with mem=%llu parameter. 6L1TF: However, doing so will make a part of your RAM unusable. 6L1TF: Reading https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html might help you decide. 6MMIO Stale Data: Unknown: No mitigations 6Register File Data Sampling: %s 6L1D Flush : Conditional flush on switch_mm() enabled 4Speculative Return Stack Overflow: IBPB-extending microcode not applied! 4Speculative Return Stack Overflow: WARNING: See https://kernel.org/doc/html/latest/admin-guide/hw-vuln/srso.html for mitigation options.6Speculative Return Stack Overflow: %s 4GDS: Microcode update needed! Disabling AVX as mitigation. 4GDS: Mitigation locked. Disable failed. 3Spectre V2 : System may be vulnerable to spectre v2 6Spectre V2 : Update user space SMT mitigation: STIBP %s 4MDS CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/mds.html for more details. 4TAA CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html for more details. 4MMIO Stale Data CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/processor_mmio_stale_data.html for more details. Unknown (XEN PV detected, hypervisor mitigation required) ; BHI: Vulnerable, KVM: SW loopVulnerable: untrained return thunk / IBPB on non-AMD based uarch Unpatched return thunk in use. This should not happen! Vulnerable: Microcode, no safe RETMitigation: IBPB on VMEXIT onlyMitigation: Speculative Store Bypass disabledMitigation: Speculative Store Bypass disabled via prctlMitigation: Speculative Store Bypass disabled via prctl and seccompMitigation: Enhanced / Automatic IBRSMitigation: Enhanced / Automatic IBRS + RetpolinesMitigation: Enhanced / Automatic IBRS + LFENCEUser space: Mitigation: STIBP via prctlUser space: Mitigation: STIBP via seccomp and prctlMitigation: untrained return thunkVulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriersMitigation: usercopy/swapgs barriers and __user pointer sanitizationMitigation: AVX disabled, no microcodeMitigation: Microcode (locked)Mitigation: Clear Register FileVulnerable: Clear CPU buffers attempted, no microcode  spec_rstack_overflowl1tfspectre_bhi retbleednospectre_v1gather_data_samplingl1d_flushsrbdsreg_file_data_samplingmmio_stale_datatsx_async_abortmdsGCC: (Debian 12.2.0-14) 12.2.0GNU+Q n0@P`pIm)8 N |)4 @{)@)x )X)T )P)L( S?)HO)DO   Pu q9 =Zy &d/ s y)+ ` )  p )()$/EP )) p)  v=)L|`)<q)+`(),)'@p+'+@ + 0+`8+8 ' P$+ 0+=+J+V+0g+(x $$$$$%'')+#%8'Q--%0'p %H#' F%`c' %x'-% ' /1%M'm%'%'%'G%['"s-- -( -01 -8[ -@ -H p;0a)?0@U,Y      * E X j y  f )     )h )`& 0N< M c u P  ^     @  )0& 7  P d  )p|    P      ! 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