ELF>`@@HHATAUHSuLHc<H8HH HHy7H H;8x*LcsHuHu[1]A\[]A\ULHAWL8AVL AULLATALSHHH0eHHD$(1H|$HD$HD$DHD$Ar)HD$(eH+HeD[A\A]A^A_]DLDD$LLLH|$LH|$DD$HLuHHHǃ0HǃDD$\fAUATIUSHHu8LH5@HxHtM[]A\A]HHtHLoPMuL/HLHH 놐HHtHH_PHuHHHHH []A\A]HH HfUHAWAVAUAATISHH eHHD$1AKN4KH$HD$I$ I$LHL,$Ic$<I$8HH HHy.H I;$8x LksHLH I;$8yHD$eH+He[A\A]A^A_]DI(I<$HtHLPMuL?LLHH 5I<$HtHLPMuL?LLHH ff.AWAVLAUILATUHS1I HHLt%H]sLLHHLu[L]LA\A]A^A_fDAWAVAUATLPUSHLLHLHLsXHCXMHK`LHLHL$HHSpLǃHH$H$HL$HLu1LLLHtkHHL[]A\A]A^A_HCpHLHC`HBHAHCpHBLǃLLH[]A\A]A^A_ff.ATAUHS<H8 2H Hc<HH+8HH9}LcsHHB[]A\ff.@USHHt[]H;H;9H;tÐH;HtHH_PHuHHHH []fPf w&t[1f Hƒf HHD HHcHH H9p9p } H$H9u1HHPf w&tZ1f Hƒf HHD HHcHH H909p} H$H9u1HHfAVAUATIUSG <P<ۃ fP v@LE1@DEI<$IHLL!ID [L]A\A]A^USHG t=H?H3HtHv[H1]DH;DHHH߾DDHH;D1HHH߾D[][]ff.AW@AVAUATUSHHL'H;@HH@H߉%`=@yI$HHH$@C ~DHH;DHHDH߉H߃A@HH;@HH@H߉@HH;@HH@H@HH;AA@jHǺ@@@HAXEtH;HtHH H<$HHHHH[]A\A]A^A_ _HH; _HH _H߉}@HH;@HH@H@HH;1Ҿ@HH@HC 4H[]A\A]A^A_@HH;@HHHH@%H@HeeD=D$ ILct$ l@HH;@HH@HAAHL)L9sSeeD%E9uHe uyD$ EDAA)Dl$ IPH;HtHHf.AWAVAUATUSHHH7HtHv1H{^HHHHIHHhH9t$t!HEHHHhH9uܾTHH;THHTH߉ `HH; `HH `H߉ @`HH;@`HH@`H߉``HH;``HH``H߉_DHHDH;DHHDH߉CPHH;PHHPH߉(C P HH;P HHP H߉HH;HHH߉pHH;pHHpH߉L@HH;@HHH߾@@HH;@Hǁ H@HeeD=D$ILct$h@HH;@HH@HAAusHL)L9sPeeD%E9uHe u뀋D$EDAA)Dl$IWH;HtHH@HH;@HH@H߉@HH;@HH@H@HH;1Ҿ@HH@H@HH;AA1jHǺ@@@H߉XtH;HtHHC J _HH; _HH _H߉H߽ AL@Bu _HH; _HH _HAAAfLd-HLHINE1I9AEOC nDHH;DHHDHAAn@HH;@HHHH@ @HH߾@@HH;@1HHH߾@H[]A\A]A^A_pCDhAHHtHzDHHH;HtHHDHH;DHHDH߉PHH;PHHPH߉CH;HtHH HH; HHHH H HACH;xHtHHwCH;HtHHCH;[HtHHCH;DHtHHCH;HtHHCH;HtHHCH;!HtHHCH;HtHHCH;HtHHCH;HtHH.HtHzLwPMt'DLHH HL7ԐHtHHoPHuH/HHH BHtHHoPHuH/HHH HtHHoPHuH/HHH JHtHHoPHuH/HHH HtHHoPHuH/HHH 6HtHHoPHuH/HHH HtHHoPHuH/HHH HtHHoPHuH/HHH tHtHHoPHuH/HHH HtHHoPHuH/HHH rHtHHoPHuH/HHH ATL`USHLHL[]A\DAUL`ATUSHL HHIăuCHuŃu%@9DtLHt-D[L]A\A]@uċHLHDHLL[]A\A]H;HtHH_PHuHHHHH [L]A\A]H/fUH`SHH HHt9HHt1H[]DH[]H;HtHH_PHuHHHHH ff.@AUATUSHL`LIH@u HLL[]A\A]ff.AUATAUSHHt4L`HLDH9u#LHH1[H]A\A]DHu!DHhLH[]A\A]LAWAVIAUAATUSHL`HLIĸdHEB[HtXL 09Lʼn0LMt LHHLH[]A\A]A^A_DHH8LLL붐H;HtHLoPMt0L$HLHH L$4L/ff.fUHAVL8AUATL`SHLHH eHHD$1H$HD$LHǃMtoH LHHLHHLǃ0LHHD$eH+uHe[A\A]A^]Lff.ATL`USHLHJLH[]A\fDAVAUAATIULSHL.rJHL`LHu HSLM,$[]A\A]A^H?HtHLwPMuL7HLHH uAVAUAATIUHSLL.r6LHtLm[]A\A]A^[1]A\A]A^H?HtHLwPMuL7HLHH ff.AVAUIATIUHպLSHt\1M$` HHLt9H]sLL[LLI]HHLu[]A\A]A^I<$HtHH_PHuHHHHH bff.AU1ATL8US,HD$€`,0PfvpAEt E1AE1H3HtHvAH1HE%@GxGHAH#Wf @H @\E9sAAt8H;E9\ARHtHHE1HEAAALJH1DH`HHE11ɺ HHHHǃHHHHL[]A\A]ApH3AHfAH11H=HAH#W@A @E1HtHDHf w*HH#Wu*Af+E11AAfDH8AWAVAUAATDUSHH0eHHD$(1HHDp(DDH3HtHvEH1E1H`HHD$@HD$HH@(Lrasync_put_wakeref)drivers/gpu/drm/i915/display/intel_display_power.cdrm_WARN_ON(!queue_delayed_work(system_unbound_wq, &power_domains->async_put_work, msecs_to_jiffies(delay_ms)))%s %s: [drm] Use count on domain %s is already zero %s %s: [drm] Async disabling of domain %s is pending %s %s: [drm] ISP not power gated [drm] *ERROR* LCPLL not locked yet [drm] *ERROR* Switching back to LCPLL failed %s %s: [drm] CRTC for pipe %c enabled [drm] *ERROR* CRTC for pipe %c enabled %s %s: [drm] Display power well on [drm] *ERROR* Display power well on %s %s: [drm] CPU PWM1 enabled [drm] *ERROR* CPU PWM1 enabled %s %s: [drm] CPU PWM2 enabled [drm] *ERROR* CPU PWM2 enabled %s %s: [drm] PCH PWM1 enabled [drm] *ERROR* PCH PWM1 enabled %s %s: [drm] Utility pin enabled in PWM mode [drm] *ERROR* Utility pin enabled in PWM mode [drm] *ERROR* PCH GTC enabled [drm] *ERROR* Switching to FCLK failed [drm] *ERROR* LCPLL still locked [drm] *ERROR* D_COMP RCOMP still in progress drm_WARN_ON(power_domains->domain_use_count[domain] != 1)drm_WARN_ON(((__builtin_constant_p(domain) && __builtin_constant_p((uintptr_t)(power_domain_set->mask.bits) != (uintptr_t)((void *)0)) && (uintptr_t)(power_domain_set->mask.bits) != (uintptr_t)((void *)0) && __builtin_constant_p(*(const unsigned long *)(power_domain_set->mask.bits))) ? const_test_bit(domain, power_domain_set->mask.bits) : _test_bit(domain, power_domain_set->mask.bits)))drm_WARN_ON(!bitmap_subset(mask->bits, power_domain_set->mask.bits, POWER_DOMAIN_NUM))Adjusting requested max DC state (%d->%d) [drm] *ERROR* Unexpected value for enable_dc (%d) %s %s: [drm] Invalid set of dbuf slices (0x%x) requested (total dbuf slices 0x%x) %s %s: [drm] DBuf slice %d power %s timeout! drm_WARN_ON(((&_Generic(display, const struct drm_i915_private *: __i915_to_display((struct drm_i915_private *)(display)), struct drm_i915_private *: __i915_to_display((struct drm_i915_private *)(display)), const struct intel_display *: (display), struct intel_display *: (display))->info.__runtime_info)->step) == STEP_NONE)Unknown memory configuration; disabling address buddy logic. toggling display PHY side reset %s %s: [drm] VED not power gated [drm] *ERROR* CDCLK source is not LCPLL [drm] *ERROR* LCPLL is disabled [drm] *ERROR* LCPLL not using non-SSC reference drm_WARN_ON(power_domains->init_wakeref)drm_WARN_ON(power_domains->disable_wakeref)BIOS left unused %s power well enabled, disabling it drm_WARN_ON(!domains || domains->ddi_io == POWER_DOMAIN_INVALID)drm_WARN_ON(!domains || domains->ddi_lanes == POWER_DOMAIN_INVALID)drm_WARN_ON(!domains || domains->aux_io == POWER_DOMAIN_INVALID)drm_WARN_ON(!domains || domains->aux_legacy_usbc == POWER_DOMAIN_INVALID)drm_WARN_ON(!domains || domains->aux_tbt == POWER_DOMAIN_INVALID)%s %s: [drm] %sdomainMissing case (%s == %ld) ?Failed to write to D_COMP Current CDCLKEnabling package C8+ %s %s: [drm] SPLL enabled [drm] *ERROR* SPLL enabled %s %s: [drm] WRPLL1 enabled [drm] *ERROR* WRPLL1 enabled %s %s: [drm] WRPLL2 enabled [drm] *ERROR* WRPLL2 enabled %s %s: [drm] Panel power on [drm] *ERROR* Panel power on %s %s: [drm] PCH GTC enabled %s %s: [drm] IRQs enabled [drm] *ERROR* IRQs enabled drm_WARN_ON(!power_well)Allowed DC state mask %02x &power_domains->lockenabledisableUpdating dbuf slices to 0x%x Initial PHY_CONTROL=0x%08x Disabling package C8+ enableddisabledRuntime power status: %s Use countPower well/domain%-25s %s %-25s %d %-23s %d DISPLAY_COREPIPE_APIPE_BPIPE_CPIPE_DPIPE_PANEL_FITTER_APIPE_PANEL_FITTER_BPIPE_PANEL_FITTER_CPIPE_PANEL_FITTER_DTRANSCODER_ATRANSCODER_BTRANSCODER_CTRANSCODER_DTRANSCODER_EDPTRANSCODER_DSI_ATRANSCODER_DSI_CTRANSCODER_VDSC_PW2PORT_DDI_LANES_APORT_DDI_LANES_BPORT_DDI_LANES_CPORT_DDI_LANES_DPORT_DDI_LANES_EPORT_DDI_LANES_FPORT_DDI_LANES_TC1PORT_DDI_LANES_TC2PORT_DDI_LANES_TC3PORT_DDI_LANES_TC4PORT_DDI_LANES_TC5PORT_DDI_LANES_TC6PORT_DDI_IO_APORT_DDI_IO_BPORT_DDI_IO_CPORT_DDI_IO_DPORT_DDI_IO_EPORT_DDI_IO_FPORT_DDI_IO_TC1PORT_DDI_IO_TC2PORT_DDI_IO_TC3PORT_DDI_IO_TC4PORT_DDI_IO_TC5PORT_DDI_IO_TC6PORT_DSIPORT_CRTPORT_OTHERVGAAUDIO_MMIOAUDIO_PLAYBACKAUX_IO_AAUX_IO_BAUX_IO_CAUX_IO_DAUX_IO_EAUX_IO_FAUX_AAUX_BAUX_CAUX_DAUX_EAUX_FAUX_USBC1AUX_USBC2AUX_USBC3AUX_USBC4AUX_USBC5AUX_USBC6AUX_TBT1AUX_TBT2AUX_TBT3AUX_TBT4AUX_TBT5AUX_TBT6GMBUSGT_IRQDC_OFFTC_COLD_OFFINIT  g c u             0 Z  w   6 B R   h E  j 8"/5L#L;A 28L/5L#L;A/5L17A/5L88i915.import_ns=PWMGCC: (Debian 12.2.0-14+deb12u1) 12.2.0GNU6@xW  ~'0`j`2*aR0i`xsxH $l`H`w   6.9 =E*wd*+1,`HHQh 0&2BVp&@KXm}!<V_z *?8 ;Rpz`T0Ss# !:" "= #a q `$     P'  p'- D Z v        ( L 5h  <  =  >B >, ?H ^ PAy 0B  C     0D; DV f u E    Fr GrHs6Hs\0Isintel_display_power.casync_put_domains_clear_domain__intel_display_power_is_enabledintel_display_power_grab_async_put_refqueue_async_put_domains_workintel_display_power_domain_str.part.0__intel_display_power_put_domainCSWTCH.120release_async_put_domainsintel_display_power_put_async_work__intel_display_power_get_domain.part.0assert_isp_power_gatedisp_ids.0intel_port_domains_for_aux_chd11_port_domainsi9xx_port_domainsd13_port_domainsd12_port_domainsintel_port_domains_for_portintel_pch_reset_handshakehsw_write_dcomphsw_restore_lcpllhsw_enable_pc8__key.1bxt_display_core_uninit.part.0icl_display_core_uninit.part.0bxt_display_core_initicl_display_core_initwa_1409767108_buddy_page_maskstgl_buddy_page_masks__UNIQUE_ID___addressable___SCK__preempt_schedule918.3__UNIQUE_ID___addressable___SCK__preempt_schedule916.4__UNIQUE_ID_modinfo775__UNIQUE_ID___addressable___SCK__might_resched41.5.LC2__x86_return_thunkintel_display_rpm_suspendedintel_power_well_is_always_onintel_power_well_is_enabled_cached__ref_stack_chk_guard__bitmap_or_find_first_bitcancel_delayed_workintel_display_rpm_put_raw__stack_chk_fail__msecs_to_jiffiessystem_unbound_wqqueue_delayed_work_ondev_driver_string__warn_printkintel_power_well_putintel_display_rpm_get_noresumeintel_display_rpm_putintel_display_rpm_get_rawmutex_lockmutex_unlockintel_power_well_getpci_dev_presentvlv_iosf_sb_getvlv_iosf_sb_readvlv_iosf_sb_putintel_dmc_wl_getto_intel_uncore__x86_indirect_thunk_raxintel_dmc_wl_putintel_pcode_write_timeout__drm_dev_dbgintel_uncore_forcewake_get__intel_wait_for_register_dev_errintel_uncore_forcewake_putintel_update_cdclkintel_cdclk_dump_config__preempt_countcpu_numberlocal_clock__SCT__preempt_schedulelpt_disable_clkout_dpintel_irqs_enabled__const_udelayktime_get_raw__SCT__might_reschedusleep_range_stateintel_display_power_set_target_dc_statelookup_power_wellintel_power_well_is_enabledintel_power_well_enableintel_power_well_disableintel_display_power_get_current_dc_stateintel_display_power_getintel_display_rpm_getintel_display_power_get_if_enabledintel_display_rpm_get_if_in_use__intel_display_power_put_asyncintel_display_power_flush_workintel_display_power_put_uncheckedintel_display_rpm_put_uncheckedintel_display_power_get_in_setintel_display_power_get_in_set_if_enabledintel_display_power_put_mask_in_set__bitmap_subsetintel_power_domains_init__mutex_initdelayed_work_timer_fntimer_init_keyintel_display_power_map_initintel_power_domains_cleanupintel_display_power_map_cleanupgen9_dbuf_slices_updategen9_disable_dc_statesintel_cdclk_uninit_hwintel_pmdemand_program_dbufintel_dmc_disable_programintel_combo_phy_uninitgen9_set_dc_stateintel_cdclk_init_hwintel_enabled_dbuf_slices_maskintel_dmc_load_programintel_combo_phy_initintel_dram_infointel_snps_phy_wait_for_calibrationintel_power_domains_init_hwintel_power_well_sync_hwintel_power_domains_driver_removecancel_delayed_work_syncintel_power_domains_sanitize_stateintel_power_well_nameintel_power_domains_enableintel_power_domains_disableintel_power_domains_suspendintel_dmc_has_payloadintel_power_domains_resumeintel_display_power_suspend_latebxt_enable_dc9intel_display_power_resume_earlygen9_sanitize_dc_statebxt_disable_dc9intel_init_pch_refclkintel_clock_gating_initintel_display_power_suspendintel_display_power_resumegen9_enable_dc5skl_enable_dc6intel_display_power_debugseq_printfintel_power_well_refcountintel_power_well_domainsintel_display_power_ddi_io_domainintel_display_power_ddi_lanes_domainintel_display_power_aux_io_domainintel_display_power_legacy_aux_domainintel_display_power_tbt_aux_domain__SCK__preempt_schedule__SCK__might_reschedK*+,-2.N-./012"3)4=5n6u  76 h 7  7 1O-h #.8-_6l t76 729;<0/= 1l=y=>8 #`=?U@gAvB6 H7 # #   #B #`x # #  # #`; CD D] Ez E G 3 C D E F- C5 DK E C D E F I C D9 EH Fh Cp D E F C D E F C D J% F> pC K] Le Mv N C D E F C D E F C# D9 EF Fu C} D E E F O P Q CDE*FKOSP]QgOnRQ K \HS_CgDEFCDEFCD EF.C6DOE^FxCDEFCDEFCD)E8FMCUDnE}FCDEFTCDE!F.C6DWEdFkOsPxQCDEFOPQOR$Q? DKQCYDrEFCDEFCDEF CD3JBFZ _KvC~DEFUVWCD EFEXUVzCDEFCDE EF#C+DAE K KCDEFC D#E2FZ _KqCyDEEF K <K9 >Kc hK XK K K  K5 :K_ @dK6 76 76 r 716; C7h6r z76 h76 7 6 x7D6N ZV7{6 (76 76 78<L=<[\] ^L6S ] e7<[\==6$ . 67wa<=c<=:L=b=;<= 1R =s 6z (  7 - !<>!.U!0g!=r!1!-!=!2!<!=9"aA"<a"="6" h" "7"b>#6E# hO# W#7#k#<#=#g$6$$ .$ 6$7$ $H% H%H% % %m & n & `A&ox& &H& x&K'-' 'H'<$(-(C(D(E(E(F(C(D(E(F )U)C)D1)E>)Fb) i) )6) )7)6) )7)2*t *s9*uA*<N*[Y*^a*=*v*t*w*s*u*<*[*^+=+v&+C.+DJ+Ej+Ew+F+y+C+D+E,E',FL,<Y,[d,]l,=t,z|,{,s,v,--y>--f-}n-<{-[-]-=-z-{-s.C.D.E.E.F.C/D!/EA/EN/-/C/D/E 0E0F(0C00DL0Ek0Ex0F0C0D0E1E1FN1~1 #`2C 2D:2EE2F2v2C2D2E2E3F3|&383C@3D\3E3E3F3C3D3E3E3F4C 4D)4E64FW4 a4H4C4D4E4F5 #15C95DS5Ew5E5F565 85 57526a6<6=6a6<7=+7<K7m7=767  7 777<7[8[8\+8 78HB8]M8^U8=b8@t8A8B8<8[8[8\8\"9 &.9H69=J9yq9<~9[9]9[9]9=9z9{9s9|9C:D:E+:FF:  K:Kn: h s:K:6:  : :7: @ :K:C:D;E;Fk;Cs;D;E;F;\;C<D<E)<FD<v<6< <7<e<4=<I==Q=gq=6x= = =7=<>\>4>  >>HI>^><>=?a ?<1?=_?6f?  p? x?7?<?=?g@ew@<@=@g@t@s@u@<@[@^@= AXA7AvyAaA<A=AA6A  B B7>B`BBCBDBEBE7C?CuC BCHCCCCCDCECEDFEE4EIEpE B|EHEE<E YE aF j FF F !F &FPFZFkF pFFF #F F4G6;G 8 EG MG7G6G  G G7UH6\H  fH nH7H6H  H H7uI6|I ` I I7%)))j)L)))0)F:)1) )H))6)) F HZ Fa ) Nh )\FW)=.=x=)))*)Z)# :!)!gt")#) #)#)O&p\'rB(=w*X +x=,),|W-)o/F7)=:=:b>=>gA?)3@)d@)A)A)tB)BFPDDD)DD)/EEEF=G)^G)G)G)6H)H)H)I)VI)I)0 ( 08P@H PXP`h pp x`Pp !""p#P$@'`'**+,5< =(p>0>8?@@AH BPCX D`DhEpFxpGHH I ; e""#P (08@HPX`h p xDxy{|m (08@HPX`hpGxHJKQ~#$ &('0-8Z@[H]P^Xd`hpx2ijlm:;=> X ( 0 8 @ Hx"P"X"`"h"p$#x[#\#^#_#$:$;$=$>$X))))))))))55 5(50587@7H7P7X7`|:h:p:x::h<<<<<W=====E?|?}???A B BB B(G0QG8RG@TGHUGPGXG`GhGpGx:HrHsHuHvHHIIIIZIIIII( (($y((04(<@(HL(TX(`d(lHp(x|((($([((((j(;( ("(\# (;$( )$(,)0(85<(D7H(P:T(\<`(h=l(t}?x( B(RG(G(sH(I(I( (08@%H9PFXS``hmp|x+>Qdw (08@.H>PGXP`[h_pjxy! *(30<8E@KHRPYXe.symtab.strtab.shstrtab.rela.text.data.bss.rela__patchable_function_entries.rela.smp_locks.rodata.str1.8.rodata.str1.1.rela.discard.annotate_insn.rela__bug_table.rela.rodata.rela.discard.addressable.modinfo.comment.note.GNU-stack.note.gnu.property @I@ȈK&I,I6I1@XKS@Pc2K r2BWj]@ c@  e @ j@Hj0j(jj k) zP