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MMLt$ T$T$t$  LHc҉t$LH IHt$XHx MpHHcLDHLAD A\$LLHcHHHpAAD$ HAD$LAD$D$AD$HD$`eH+ucHh[]A\A]A^A_L0M' IL|AWIAVAUIATUSHH`eHHD$X1H|$(HD$HD$HD$HD$ HHCH`UIH@LpPM LPIĉAMMLT$T$A H|$(HHcHHHhHxD`HMLDHcHLD+kLHHcHHL(ApAC LCCH|$(HD$XeH+udH`[]A\A]A^A_L0MA#IHfAWAVAUATIUHSH`eHHD$X1Ll$(HD$HD$LHD$HD$ HID$H`HEH@HXPH@HPHAAALuM;LL$$$L$ LLHc҉ $HIH $DxH H}HtHNjPAl$IHLHHDHcHHHL(A\$ LHcHHLApAAD$LAD$LAD$HD$XeH+udH`[]A\A]A^A_HH#AIlL\f.AWAVAUATIUHSH`eHHD$X1Ll$(HD$HD$LHD$HD$ HID$H`HEH@HXPH@HPHAAALuM;LL$$$L$ LLHc҉ $HIH $DxH H}HtHNjPAl$IHLHHDHcHHHL(A\$ LHcHHLApAAD$LAD$LAD$HD$XeH+udH`[]A\A]A^A_HH#AIlL\f.AWAVAUATIUHSH`eHHD$X1Ll$(HD$HD$LHD$HD$ HID$H`HEH@HXPH@HPHAAALuM;LL$$$L$ LLHc҉ $HIH $DxH H}HtHNjPAl$IHLHHDHcHHHL(A\$ LHcHHLApAAD$LAD$LAD$HD$XeH+udH`[]A\A]A^A_HH#AIlL\f.AWAVIAUATUSHHhH$H|$0eHHD$`1HD$HD$HD$ HD$(HHCH`M>IH@LhPMGLPIĉAA@MMALT$ T$ A H|$0HHcH@HHhHx@D`<HMLDHcHLD+@kIH@LhPMGLPIĉAA@MMALT$ T$ A H|$0HHcH@HHhHx@D`<HMLDHcHLD+@kfrontbuffer_bits, REC->origin"dev %s, frontbuffer_bits=0x%08x, origin=%u", __get_str(dev), REC->frontbuffer_bits, REC->origin"dev %s, pipe %c, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline"dev %s, pipe %c, frame=%u, scanline=%u, min=%u, max=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline, REC->min, REC->max"dev %s, pipe %c, frame=%u, scanline=%u, min=%u, max=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline, REC->min, REC->max"dev %s, pipe %c, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline"dev %s, pipe %c, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline"dev %s, pipe %c, %s, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline"dev %s, pipe %c, %s, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline"dev %s, pipe %c, %s, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline"dev %s, pipe %c, scaler %d, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->scaler_id, REC->frame, REC->scanline"dev %s, pipe %c, scaler %d frame=%u, scanline=%u, %dx%d%+d%+d", __get_str(dev), REC->pipe_name, REC->scaler_id, REC->frame, REC->scanline, REC->w, REC->h, REC->x, REC->y"dev %s, pipe %c, scaler %d, plane %s, frame=%u, scanline=%u, %dx%d%+d%+d", __get_str(dev), REC->pipe_name, REC->scaler_id, __get_str(name), REC->frame, REC->scanline, REC->w, REC->h, REC->x, REC->y"dev %s, pipe %c, %s, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline"dev %s, pipe %c, %s, frame=%u, scanline=%u, format=%p4cc, %d.%06ux%d.%06u%+d.%06u%+d.%06u -> %dx%d%+d%+d", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline, &REC->format, drm_rect_width((const struct drm_rect *)REC->src) >> 16, ((drm_rect_width((const struct drm_rect *)REC->src) & 0xffff) * 15625) >> 10, drm_rect_height((const struct drm_rect *)REC->src) >> 16, ((drm_rect_height((const struct drm_rect *)REC->src) & 0xffff) * 15625) >> 10, ((const struct drm_rect *)REC->src)->x1 >> 16, ((((const struct drm_rect *)REC->src)->x1 & 0xffff) * 15625) >> 10, ((const struct drm_rect *)REC->src)->y1 >> 16, ((((const struct drm_rect *)REC->src)->y1 & 0xffff) * 15625) >> 10, drm_rect_width((const struct drm_rect *)REC->dst), drm_rect_height((const struct drm_rect *)REC->dst), ((const struct drm_rect *)REC->dst)->x1, ((const struct drm_rect *)REC->dst)->y1"dev %s, pipe %c, %s, frame=%u, scanline=%u, format=%p4cc, %d.%06ux%d.%06u%+d.%06u%+d.%06u -> %dx%d%+d%+d", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline, &REC->format, drm_rect_width((const struct drm_rect *)REC->src) >> 16, ((drm_rect_width((const struct drm_rect *)REC->src) & 0xffff) * 15625) >> 10, drm_rect_height((const struct drm_rect *)REC->src) >> 16, ((drm_rect_height((const struct drm_rect *)REC->src) & 0xffff) * 15625) >> 10, ((const struct drm_rect *)REC->src)->x1 >> 16, ((((const struct drm_rect *)REC->src)->x1 & 0xffff) * 15625) >> 10, ((const struct drm_rect *)REC->src)->y1 >> 16, ((((const struct drm_rect *)REC->src)->y1 & 0xffff) * 15625) >> 10, drm_rect_width((const struct drm_rect *)REC->dst), drm_rect_height((const struct drm_rect *)REC->dst), ((const struct drm_rect *)REC->dst)->x1, ((const struct drm_rect *)REC->dst)->y1"dev %s, pipe %c, %s, frame=%u, scanline=%u, async_flip=%s", __get_str(dev), REC->pipe_name, __get_str(name), REC->frame, REC->scanline, str_yes_no(REC->async_flip)"dev %s, pipe %c, frame=%u, scanline=%u, %d/%d/%d", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline, REC->sprite0_start, REC->sprite1_start, REC->fifo_size"dev %s, pipe %c, frame=%u, scanline=%u, level=%d, cxsr=%d, wm %d/%d/%d/%d, sr %d/%d", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline, REC->level, REC->cxsr, REC->primary, REC->sprite0, REC->sprite1, REC->cursor, REC->sr_plane, REC->sr_cursor"dev %s, pipe %c, frame=%u, scanline=%u, wm %d/%d/%d, sr %s/%d/%d/%d, hpll %s/%d/%d/%d, fbc %s", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline, REC->primary, REC->sprite, REC->cursor, str_yes_no(REC->cxsr), REC->sr_plane, REC->sr_cursor, REC->sr_fbc, str_yes_no(REC->hpll), REC->hpll_plane, REC->hpll_cursor, REC->hpll_fbc, str_yes_no(REC->fbc)"dev %s, cxsr %s->%s, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u, pipe D: frame=%u, scanline=%u", __get_str(dev), str_on_off(REC->old), str_on_off(REC->new), REC->frame[0], REC->scanline[0] , REC->frame[1], REC->scanline[1] , REC->frame[2], REC->scanline[2] , REC->frame[3], REC->scanline[3]"dev %s, pch transcoder %c, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline"dev %s, pipe %c, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline"dev %s, pipe %c, frame=%u, scanline=%u crc=%08x %08x %08x %08x %08x", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline, REC->crcs[0], REC->crcs[1], REC->crcs[2], REC->crcs[3], REC->crcs[4]"dev %s, pipe %c, frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame, REC->scanline"dev %s, pipe %c disable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u, pipe D: frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame[0], REC->scanline[0] , REC->frame[1], REC->scanline[1] , REC->frame[2], REC->scanline[2] , REC->frame[3], REC->scanline[3]"dev %s, pipe %c enable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u, pipe D: frame=%u, scanline=%u", __get_str(dev), REC->pipe_name, REC->frame[0], REC->scanline[0] , REC->frame[1], REC->scanline[1] , REC->frame[2], REC->scanline[2] , REC->frame[3], REC->scanline[3](null)onoffyesno__data_loc char[]devunsigned intfrontbuffer_bitsorigincharpipe_nameu32framescanlineminmaxnameintscaler_idxywhformatint[4]srcdstboolasync_flipsprite0_startsprite1_startfifo_sizelevelcxsrprimarysprite0sprite1cursorsr_planesr_cursoru16spritesr_fbchpll_planehpll_cursorhpll_fbchpllfbcu32[I915_MAX_PIPES]oldnewu32[5]crcsdev %s, pipe %c enable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u, pipe D: frame=%u, scanline=%u dev %s, pipe %c disable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u, pipe D: frame=%u, scanline=%u dev %s, pipe %c, frame=%u, scanline=%u dev %s, pipe %c, frame=%u, scanline=%u crc=%08x %08x %08x %08x %08x dev %s, pch transcoder %c, frame=%u, scanline=%u dev %s, cxsr %s->%s, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u, pipe D: frame=%u, scanline=%u dev %s, pipe %c, frame=%u, scanline=%u, wm %d/%d/%d, sr %s/%d/%d/%d, hpll %s/%d/%d/%d, fbc %s dev %s, pipe %c, frame=%u, scanline=%u, level=%d, cxsr=%d, wm %d/%d/%d/%d, sr %d/%d dev %s, pipe %c, frame=%u, scanline=%u, %d/%d/%d dev %s, pipe %c, %s, frame=%u, scanline=%u, async_flip=%s dev %s, pipe %c, %s, frame=%u, scanline=%u, format=%p4cc, %d.%06ux%d.%06u%+d.%06u%+d.%06u -> %dx%d%+d%+d dev %s, pipe %c, %s, frame=%u, scanline=%u dev %s, pipe %c, scaler %d, plane %s, frame=%u, scanline=%u, %dx%d%+d%+d dev %s, pipe %c, scaler %d frame=%u, scanline=%u, %dx%d%+d%+d dev %s, pipe %c, scaler %d, frame=%u, scanline=%u dev %s, pipe %c, frame=%u, scanline=%u, min=%u, max=%u dev %s, frontbuffer_bits=0x%08x, origin=%u i915intel_frontbuffer_flushintel_frontbuffer_invalidateintel_pipe_update_endintel_pipe_update_vblank_evadedintel_pipe_update_startintel_crtc_vblank_work_endintel_crtc_vblank_work_startintel_fbc_nukeintel_fbc_deactivateintel_fbc_activateintel_scaler_disable_armintel_pipe_scaler_update_armintel_plane_scaler_update_armintel_plane_disable_armintel_plane_update_armintel_plane_update_noarmintel_plane_async_flipvlv_fifo_sizevlv_wmg4x_wmintel_memory_cxsrintel_pch_fifo_underrunintel_cpu_fifo_underrunintel_pipe_crcintel_crtc_flip_doneintel_pipe_disableintel_pipe_enablei915.import_ns=PWMGCC: (Debian 12.2.0-14+deb12u1) 12.2.0GNU #40 #Rpr0pp1pUpT{l`TT@(x@d_v ^ !u1!l_0"Y"^#^#^#T!`$TM$^v@%^%T &O&O%&eC`)ec+e}`.013 P55P7^:?`<w>wAJCE2HN&pJCLf`N0P`TpV@X-Y[`[] _` b1 pd_ @f$| hD j l @n- o^ q @s 0u  wg y> {l }   0 `A C ;xa a   <x a  <x d   =x5 _  a =x   (  >x d 0 >x@d587 ?xLye@g?x@yH @xyP@x@X AxBi`kAxh Bx`ypBxt9x; CxZ` t}Cx DxDx`   Ex`e+-ExEUac Fx@nFxd Gx@Gx2 dQS Hxl=Hx< `C@v``@!@ I@!o@"@#$&''hQ )h}*+@- /1!2L3w456`7 @8 ;`8 o8 8 8 8 49 h 9 @9 `9 9 9 H9 }9 :  : @: 8`: ]: {: : : ;  ; F@; r`; ; H`H/HQ H}HH@HH H-`HLHq HHH@H H0HS`HmH HHH@HH H5` HT Hr @` , R z    0 P!pG!j!!!!!!"0,"PO"pr"""""" H#>#7\#` H|##7# H#$7$$H@$^$ Ay$@H$ $?$H%(5%?Y%Hx%0%`K% H%8%A%H&@&@A1&`HL&Hi&U&H&P&0J&H'X>'Ac'@H'`'A'H'h(pA@(Hk(p(t( H(x)tA)Hg))?)`H))`7*H7*[*7|*H**7*@H*'+P7P+Hx++7+H+,79, Hf,,@ 7,H, - I+-`HU-- I-H-- I.3.F.` d. . . . . ./` A/ c/p ///////0030D0Z0m000 R 0@R 0`R 1R *1R K1R p1R 1S 1 S 1@S 1`S 2S )2S J2S e2S 2T 2 T 2@T 23-3K3[3p3 I30I3@I3PI4`I>4pIh4I4I4I4I4I 5IL5Iy5I5J5J5 J60J16@JG6PJ]6`J~6pJ6J6J6J7J07Jintel_display_trace.cperf_trace_intel_pipe_enableperf_trace_intel_pipe_disableperf_trace_intel_crtc_flip_doneperf_trace_intel_crtc_vblank_work_startperf_trace_intel_crtc_vblank_work_endperf_trace_intel_pipe_update_startperf_trace_intel_pipe_update_vblank_evadedtrace_raw_output_intel_pipe_enabletrace_raw_output_intel_pipe_disabletrace_raw_output_intel_crtc_flip_donetrace_raw_output_intel_pipe_crctrace_raw_output_intel_cpu_fifo_underruntrace_raw_output_intel_pch_fifo_underruntrace_raw_output_intel_memory_cxsrtrace_raw_output_g4x_wmtrace_raw_output_vlv_wmtrace_raw_output_vlv_fifo_sizetrace_raw_output_intel_plane_async_fliptrace_raw_output_intel_plane_update_noarmtrace_raw_output_intel_plane_update_armtrace_raw_output_intel_plane_disable_armtrace_raw_output_intel_plane_scaler_update_armtrace_raw_output_intel_pipe_scaler_update_armtrace_raw_output_intel_scaler_disable_armtrace_raw_output_intel_fbc_activatetrace_raw_output_intel_fbc_deactivatetrace_raw_output_intel_fbc_nuketrace_raw_output_intel_crtc_vblank_work_starttrace_raw_output_intel_crtc_vblank_work_endtrace_raw_output_intel_pipe_update_starttrace_raw_output_intel_pipe_update_vblank_evadedtrace_raw_output_intel_pipe_update_endtrace_raw_output_intel_frontbuffer_invalidatetrace_raw_output_intel_frontbuffer_flushperf_trace_intel_fbc_activateperf_trace_intel_fbc_deactivateperf_trace_intel_fbc_nukeperf_trace_intel_frontbuffer_flushperf_trace_intel_frontbuffer_invalidateperf_trace_intel_pipe_update_endperf_trace_intel_scaler_disable_armperf_trace_intel_pipe_scaler_update_armperf_trace_intel_plane_scaler_update_armperf_trace_intel_plane_disable_armperf_trace_intel_plane_update_armperf_trace_intel_plane_update_noarmperf_trace_intel_plane_async_flipperf_trace_vlv_fifo_sizeperf_trace_vlv_wmperf_trace_g4x_wmperf_trace_intel_memory_cxsrperf_trace_intel_pch_fifo_underrunperf_trace_intel_cpu_fifo_underrunperf_trace_intel_pipe_crctrace_event_raw_event_intel_pipe_scaler_update_armtrace_event_raw_event_vlv_fifo_sizetrace_event_raw_event_intel_frontbuffer_invalidatetrace_event_raw_event_intel_frontbuffer_flushtrace_event_raw_event_intel_pipe_update_endtrace_event_raw_event_intel_memory_cxsrtrace_event_raw_event_intel_scaler_disable_armtrace_event_raw_event_intel_pipe_crctrace_event_raw_event_intel_cpu_fifo_underruntrace_event_raw_event_intel_pch_fifo_underruntrace_event_raw_event_vlv_wmtrace_event_raw_event_g4x_wmtrace_event_raw_event_intel_pipe_update_vblank_evadedtrace_event_raw_event_intel_crtc_flip_donetrace_event_raw_event_intel_crtc_vblank_work_starttrace_event_raw_event_intel_crtc_vblank_work_endtrace_event_raw_event_intel_pipe_update_starttrace_event_raw_event_intel_pipe_enabletrace_event_raw_event_intel_pipe_disabletrace_event_raw_event_intel_plane_scaler_update_armtrace_event_raw_event_intel_plane_async_fliptrace_event_raw_event_intel_plane_disable_armtrace_event_raw_event_intel_fbc_nuketrace_event_raw_event_intel_fbc_activatetrace_event_raw_event_intel_fbc_deactivatetrace_event_raw_event_intel_plane_update_noarmtrace_event_raw_event_intel_plane_update_arm__event_intel_frontbuffer_flushprint_fmt_intel_frontbuffer_flush__event_intel_frontbuffer_invalidateprint_fmt_intel_frontbuffer_invalidate__event_intel_pipe_update_endprint_fmt_intel_pipe_update_end__event_intel_pipe_update_vblank_evadedprint_fmt_intel_pipe_update_vblank_evaded__event_intel_pipe_update_startprint_fmt_intel_pipe_update_start__event_intel_crtc_vblank_work_endprint_fmt_intel_crtc_vblank_work_end__event_intel_crtc_vblank_work_startprint_fmt_intel_crtc_vblank_work_start__event_intel_fbc_nukeprint_fmt_intel_fbc_nuke__event_intel_fbc_deactivateprint_fmt_intel_fbc_deactivate__event_intel_fbc_activateprint_fmt_intel_fbc_activate__event_intel_scaler_disable_armprint_fmt_intel_scaler_disable_arm__event_intel_pipe_scaler_update_armprint_fmt_intel_pipe_scaler_update_arm__event_intel_plane_scaler_update_armprint_fmt_intel_plane_scaler_update_arm__event_intel_plane_disable_armprint_fmt_intel_plane_disable_arm__event_intel_plane_update_armprint_fmt_intel_plane_update_arm__event_intel_plane_update_noarmprint_fmt_intel_plane_update_noarm__event_intel_plane_async_flipprint_fmt_intel_plane_async_flip__event_vlv_fifo_sizeprint_fmt_vlv_fifo_size__event_vlv_wmprint_fmt_vlv_wm__event_g4x_wmprint_fmt_g4x_wm__event_intel_memory_cxsrprint_fmt_intel_memory_cxsr__event_intel_pch_fifo_underrunprint_fmt_intel_pch_fifo_underrun__event_intel_cpu_fifo_underrunprint_fmt_intel_cpu_fifo_underrun__event_intel_pipe_crcprint_fmt_intel_pipe_crc__event_intel_crtc_flip_doneprint_fmt_intel_crtc_flip_done__event_intel_pipe_disableprint_fmt_intel_pipe_disable__event_intel_pipe_enableprint_fmt_intel_pipe_enabletrace_event_fields_intel_frontbuffer_flushtrace_event_fields_intel_frontbuffer_invalidatetrace_event_fields_intel_pipe_update_endtrace_event_fields_intel_pipe_update_vblank_evadedtrace_event_fields_intel_pipe_update_starttrace_event_fields_intel_crtc_vblank_work_endtrace_event_fields_intel_crtc_vblank_work_starttrace_event_fields_intel_fbc_nuketrace_event_fields_intel_fbc_deactivatetrace_event_fields_intel_fbc_activatetrace_event_fields_intel_scaler_disable_armtrace_event_fields_intel_pipe_scaler_update_armtrace_event_fields_intel_plane_scaler_update_armtrace_event_fields_intel_plane_disable_armtrace_event_fields_intel_plane_update_armtrace_event_fields_intel_plane_update_noarmtrace_event_fields_intel_plane_async_fliptrace_event_fields_vlv_fifo_sizetrace_event_fields_vlv_wmtrace_event_fields_g4x_wmtrace_event_fields_intel_memory_cxsrtrace_event_fields_intel_pch_fifo_underruntrace_event_fields_intel_cpu_fifo_underruntrace_event_fields_intel_pipe_crctrace_event_fields_intel_crtc_flip_donetrace_event_fields_intel_pipe_disabletrace_event_fields_intel_pipe_enabletrace_event_type_funcs_intel_frontbuffer_flushtrace_event_type_funcs_intel_frontbuffer_invalidatetrace_event_type_funcs_intel_pipe_update_endtrace_event_type_funcs_intel_pipe_update_vblank_evadedtrace_event_type_funcs_intel_pipe_update_starttrace_event_type_funcs_intel_crtc_vblank_work_endtrace_event_type_funcs_intel_crtc_vblank_work_starttrace_event_type_funcs_intel_fbc_nuketrace_event_type_funcs_intel_fbc_deactivatetrace_event_type_funcs_intel_fbc_activatetrace_event_type_funcs_intel_scaler_disable_armtrace_event_type_funcs_intel_pipe_scaler_update_armtrace_event_type_funcs_intel_plane_scaler_update_armtrace_event_type_funcs_intel_plane_disable_armtrace_event_type_funcs_intel_plane_update_armtrace_event_type_funcs_intel_plane_update_noarmtrace_event_type_funcs_intel_plane_async_fliptrace_event_type_funcs_vlv_fifo_sizetrace_event_type_funcs_vlv_wmtrace_event_type_funcs_g4x_wmtrace_event_type_funcs_intel_memory_cxsrtrace_event_type_funcs_intel_pch_fifo_underruntrace_event_type_funcs_intel_cpu_fifo_underruntrace_event_type_funcs_intel_pipe_crctrace_event_type_funcs_intel_crtc_flip_donetrace_event_type_funcs_intel_pipe_disabletrace_event_type_funcs_intel_pipe_enableevent_class_intel_frontbuffer_flushstr__i915__trace_system_nameevent_class_intel_frontbuffer_invalidateevent_class_intel_pipe_update_endevent_class_intel_pipe_update_vblank_evadedevent_class_intel_pipe_update_startevent_class_intel_crtc_vblank_work_endevent_class_intel_crtc_vblank_work_startevent_class_intel_fbc_nukeevent_class_intel_fbc_deactivateevent_class_intel_fbc_activateevent_class_intel_scaler_disable_armevent_class_intel_pipe_scaler_update_armevent_class_intel_plane_scaler_update_armevent_class_intel_plane_disable_armevent_class_intel_plane_update_armevent_class_intel_plane_update_noarmevent_class_intel_plane_async_flipevent_class_vlv_fifo_sizeevent_class_vlv_wmevent_class_g4x_wmevent_class_intel_memory_cxsrevent_class_intel_pch_fifo_underrunevent_class_intel_cpu_fifo_underrunevent_class_intel_pipe_crcevent_class_intel_crtc_flip_doneevent_class_intel_pipe_disableevent_class_intel_pipe_enable__tpstrtab_intel_frontbuffer_flush__tpstrtab_intel_frontbuffer_invalidate__tpstrtab_intel_pipe_update_end__tpstrtab_intel_pipe_update_vblank_evaded__tpstrtab_intel_pipe_update_start__tpstrtab_intel_crtc_vblank_work_end__tpstrtab_intel_crtc_vblank_work_start__tpstrtab_intel_fbc_nuke__tpstrtab_intel_fbc_deactivate__tpstrtab_intel_fbc_activate__tpstrtab_intel_scaler_disable_arm__tpstrtab_intel_pipe_scaler_update_arm__tpstrtab_intel_plane_scaler_update_arm__tpstrtab_intel_plane_disable_arm__tpstrtab_intel_plane_update_arm__tpstrtab_intel_plane_update_noarm__tpstrtab_intel_plane_async_flip__tpstrtab_vlv_fifo_size__tpstrtab_vlv_wm__tpstrtab_g4x_wm__tpstrtab_intel_memory_cxsr__tpstrtab_intel_pch_fifo_underrun__tpstrtab_intel_cpu_fifo_underrun__tpstrtab_intel_pipe_crc__tpstrtab_intel_crtc_flip_done__tpstrtab_intel_pipe_disable__tpstrtab_intel_pipe_enable__UNIQUE_ID_modinfo523__tracepoint_intel_pipe_enable__SCT__tp_func_intel_pipe_enable__traceiter_intel_pipe_enable__tracepoint_intel_pipe_disable__SCT__tp_func_intel_pipe_disable__traceiter_intel_pipe_disable__tracepoint_intel_crtc_flip_done__SCT__tp_func_intel_crtc_flip_done__traceiter_intel_crtc_flip_done__tracepoint_intel_pipe_crc__SCT__tp_func_intel_pipe_crc__traceiter_intel_pipe_crc__tracepoint_intel_cpu_fifo_underrun__SCT__tp_func_intel_cpu_fifo_underrun__traceiter_intel_cpu_fifo_underrun__tracepoint_intel_pch_fifo_underrun__SCT__tp_func_intel_pch_fifo_underrun__traceiter_intel_pch_fifo_underrun__tracepoint_intel_memory_cxsr__SCT__tp_func_intel_memory_cxsr__traceiter_intel_memory_cxsr__tracepoint_g4x_wm__SCT__tp_func_g4x_wm__traceiter_g4x_wm__tracepoint_vlv_wm__SCT__tp_func_vlv_wm__traceiter_vlv_wm__tracepoint_vlv_fifo_size__SCT__tp_func_vlv_fifo_size__traceiter_vlv_fifo_size__tracepoint_intel_plane_async_flip__SCT__tp_func_intel_plane_async_flip__traceiter_intel_plane_async_flip__tracepoint_intel_plane_update_noarm__SCT__tp_func_intel_plane_update_noarm__traceiter_intel_plane_update_noarm__tracepoint_intel_plane_update_arm__SCT__tp_func_intel_plane_update_arm__traceiter_intel_plane_update_arm__tracepoint_intel_plane_disable_arm__SCT__tp_func_intel_plane_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