ELF>@@H uH8HtDH@HH`fHc;F0}/HV8HHHPHRH HcxH81ff.fHeHHD$HD$Ht:HHzt,HXHt$HHT$eH+u H1@ATUSHj HLH}HtHE1fx HcU0HE8HI$AH4 H(H9t\HHtH; uHPHRHtًHH)HM(HHRPtLH(HA H9uEA1[]A\ff.fAUAATAUESHIDdQDIHM I LIHELD[9M]A\A]fAWAVAUATUSHG0HII1E1A9]0~uHcHHE8HHHtLBIHL$HtH HXI9uH L9tLLtL$IHxLHA 9]0HD[]A\A]A^A_E1fH8 AUATUHSHH eHHD$1t"HT$eH+QH []A\A]L#Mt LIHD$HHHD$I<$Ht$H|$HtoH H9 uH9tHHH=LhMtLHIH=woLHu|AL$ H|$HuH|$HHHD$eH+uZH H H H[]HXA\A]H|$D$D$H|$D$D$ff.AWAVIAUATIUHSHH(L?Mt LIH L HD$AD$AD$tBLLEuAFA>'%E1H([]A\A]A^A_ELLD$t$L‰D$$A>D$AVHLL$D$IhLD$ zD$9D$|D$Dd$ A>A9~ENEB HD$@9Hu&DLuT$ LLEHD Aut$ L<uEuhj@LPjDl$DL$8EFT$HtHHoPHuH/L$HH=HHAD$L$AWAVAUATIUSHH@H.H<$Ht$Ht HHHD$H<$M<$LM8 LLl$H<$LII LIHD$I LHD$(M&HD$ Mt LIE I4$EHHtHvH1A A fx D$?Lt$0E1 AAtlDHIHtHHDD HLsAH $AHH)HHA(HxAuHLt$0Ll$HT$ Ht$LH|$HHpHcHD`,DdLAD+`LDH}DHHH|$0H|$0DHDHH|$HLHL$ HT$(LHt$E1HHLt$AADHIHtHHDD HLsAH $HH)HHA(L`LfxLAAwLt$I 1H|$11HLfx |$?tRHD$HǀI0H<$H1H@L[]A\A]A^A_D$?sHHD$HǀH@[]A\A]A^A_HHD$|$?HǀpI<$HtHLgPMuL'HH=HLfx vE9t7H}HtHLgPMuL'HH=HLD$?fAWAVIAUIATUSHH`H.HL$eHHD$X1Ht HHHD$MLHL|$0HD$I8 HH$HD$D$ A D$$H;HL Mt LIAD$A$PAIDE1DD$(tm LI<$ HHH|$8DD$(H|$8 AA!HDD LHLHHLHpLc|$ HD`,FdLAD+`LDH}DHHH|$(H|$(DHDHHLH<$|$$hHD$H|$H H<$H)xf DAf =H  D$P HD$@H  HD$HF|@DHH}DHHH<$H<$D%HD DHHAL,$ArdDHIHtHHDD HLsAHH)IV(HHxAsL,$HD$XeH+HL$H`HL[L]A\A]A^A_D|$ A ADHDi|A AĤDH}Ic׹DHHHDHDHA AĨDH}DDHHDHHt$0HLHLHA$E1"I<$HtHHWPHuHHT$(HH=HT$(HA$HDD$(DD$(HHA ׀trH HA DD H}HtHLgPMuL'HH=HLAI u[HtkE1tI<$HtHLPMtBHH=HLA$AHIL?DE1D AWIAVAUATUHSDHXL $H|$ L$ DL$D$HD$Mt LIIHHD$@HEHD$8A%|$HD$uFD$T$ Шt6I>HtHHoPHuH/HH=HHD$u9\$ D$Dl$EtaHD$ H|$@HXHD$0DD$0H=AQAHHl$0LELHp@ HD$0l$HL@ʼnƉD$LAt @UIH(Ht HHLAAAAEiqtfxD$ I6AAAEiqHtHvAU1HATAYE1AZ|$HiD$ |$ؙD$ AM9DL$L\$(L4$MEH$AAAAH0EiqHtHv1EEH|$RH|$ މT$1LAHLL$(A|AQAA1ҋ|$AHHDHAH6AQ1DDA!EA@ML4$|$HEI6HtHvD$LHE1PATE1Y^HXD[]A\A]A^A_|$H A|HipH$AH1ҍHH4$t=9~9I6HtHvjEEHS1E1A[A\A܉D$ I6AAAEiqHAUH1AT1XZLAdH|$8A`DEgI6HtHvH1AHt$8H|$ LAADAD$)9\$ 6L4$EI6HtHvH1D$D$=T$L(A|AQ1҉HD$0HLƍHcHi97XH ) D1D!ΉAA;AHD$8ADH|$@ H HD$ HXAHD$0@HD9AEEML4$E;I>HtHHoPHuH/D$HH=HHD$DD$EuH$H8HtHHoPHuH/HH=HH6I>HtHHoPHuH/D $HH=HHD $ H$H8HtHHWPHt7HT$PHH=HT$PH|fAHI>HtHHoPHt+HH=HH'EH/AWAVIAUATUHSHHHL'eHHD$@1Mt LIHMHD$HD$$HD$HEMHD$,H$HD$4Zx H4$|Lƃ~/HD$@x7)HHHH!ˆHǃLƃD$1H4$HLL$L$HIAI4$HIIDЀ|$MDȅLEHtHvRH1HE1HALL$$HLHD$AXUAIHEE11LL$HHLHD$ Ht$E1HL$HLD$(A`HHLQD$ HjL$T$t$DHDHD$eH+u"H[]A\DCA;u@ATUSHHH eHHD$1Ht HHŀD$Lu!HT$eH+u|H[]A\HT$HT$xtHuHX8ML$`ED$@HtHvRPW1QH1H uactive MST streams %d -> %d %s %s: [drm] %sTrying bpp %d.%04d drm_WARN_ON(!is_mst)failed finding vcpi slots:%d yesnodrm_WARN_ON(!crtc_state)MST DSCMST link BWDP-MST %cdrivers/gpu/drm/i915/display/intel_dp_mst.cdrm_WARN_ON(((&(display)->info.__runtime_info)->ip.ver) >= 12 && first_mst_stream && !intel_dp_mst_is_master_trans(pipe_config))[CONNECTOR:%d:%s] DSC HBLANK expansion quirk detected [%s:%d] HDCP MST init failed, skipping. [CRTC:%d:%s][CONNECTOR:%d:%s] DSC needed by hblank expansion quirk [CRTC:%d:%s][CONNECTOR:%d:%s] Increasing link min bpp to 24 due to hblank expansion quirk drm_WARN_ON(limits->min_rate != limits->max_rate)[CRTC:%d:%s][CONNECTOR:%d:%s] Increasing link min bpp to %d.%04d in DSC mode due to hblank expansion quirk drm_WARN_ON(intel_dp->mst.active_streams == 0)drm_WARN_ON(((&(display)->info.__runtime_info)->ip.ver) >= 12 && last_mst_stream && !intel_dp_mst_is_master_trans(old_crtc_state))drm_WARN_ON(pipe_config->has_pch_encoder)drm_WARN_ON(((&(display)->info.__runtime_info)->step) == STEP_NONE)drm_WARN_ON(!dsc && (fxp_q4_to_frac(min_bpp_x16) || fxp_q4_to_frac(max_bpp_x16) || fxp_q4_to_frac(bpp_step_x16)))drm_WARN_ON(min_bpp_x16 != max_bpp_x16)Limiting bpp to max DPT bpp (%d.%04d -> %d.%04d) Looking for slots in range min bpp %d.%04d max bpp %d.%04d Can't get valid DSC slice count drm_WARN_ON(min_bpp_x16 % bpp_step_x16 || max_bpp_x16 % bpp_step_x16)drm_WARN_ON(remote_tu < crtc_state->dp_m_n.tu)drm_WARN_ON(slots != crtc_state->dp_m_n.tu)Got %d slots for pipe bpp %d.%04d dsc %d DSC required but not available Try DSC (fallback=%s, joiner=%s, force=%s) %s %s: [drm] Cannot Force BPC for MST Trying to find VCPI slots in DSC mode DSC Source supported min bpp %d max bpp %d DSC Sink supported min bpp %d max bpp %d DSC Sink supported compressed min bpp %d.%04d compressed max bpp %d.%04d drm_WARN_ON(!is_power_of_2(bpp_step_x16))[CONNECTOR:%d:%s][ENCODER:%d:%s] MST mode got reset, removing topology (ret=%d, ctrl=0x%02x)  V } ,      V L     I i915.import_ns=PWMGCC: (Debian 12.2.0-14+deb12u1) 12.2.0GNU+,PDZC|l~   %!B[j `   Ss    +0 F   !``<`hi~p[&- (5d (0 8O@~HPX `=hmpx!7Par-Kh )@Xt 3 W t       + H c       5 X y       4 F W }        : U q      9YlAUr'C[w'Hd}7Ph#@^}*Oi-3&B[`/du11M24j`2223 4'=]{5=iintel_dp_mst.cmst_stream_post_pll_disablemst_stream_get_hw_statemst_stream_get_configmst_connector_atomic_best_encodermst_connector_get_hw_statemst_stream_compute_config_lateintel_dp_mst_bw_overheadget_pipes_downstream_of_mst_portmst_topology_poll_hpd_irqmst_connector_atomic_checkmst_connector_mode_valid_ctxmst_connector_detect_ctxmst_connector_get_modesmst_stream_initial_fastset_checkmst_stream_pre_enablemst_stream_pre_pll_enablemst_stream_disablemst_stream_encoder_destroymst_topology_add_connectormst_connector_funcsmst_connector_helper_funcsadjust_limits_for_dsc_hblank_expansion_quirkmst_stream_post_disablemst_stream_enablemst_stream_compute_configmst_topology_cbsmst_stream_encoder_funcs__UNIQUE_ID_addressable___SCK__WARN_trap_702.0__UNIQUE_ID_addressable___SCK__WARN_trap_701.1__UNIQUE_ID_addressable___SCK__WARN_trap_700.2__UNIQUE_ID_addressable___SCK__WARN_trap_699.3__UNIQUE_ID_addressable___SCK__WARN_trap_698.4__UNIQUE_ID_addressable___SCK__WARN_trap_697.5__UNIQUE_ID_addressable___SCK__WARN_trap_696.6__UNIQUE_ID_addressable___SCK__WARN_trap_695.7__UNIQUE_ID_addressable___SCK__WARN_trap_694.8__UNIQUE_ID_addressable___SCK__WARN_trap_684.9__UNIQUE_ID_addressable___SCK__WARN_trap_683.10__UNIQUE_ID_addressable___SCK__WARN_trap_682.11__UNIQUE_ID_addressable___SCK__WARN_trap_681.12__UNIQUE_ID_addressable___SCK__WARN_trap_680.13__UNIQUE_ID_addressable___SCK__WARN_trap_679.14__UNIQUE_ID_addressable___SCK__WARN_trap_675.15__UNIQUE_ID_modinfo_557.LC1.LC2.LC30__x86_indirect_thunk_rax__x86_return_thunk__ref_stack_chk_guard__x86_indirect_thunk_rdx__stack_chk_fail__drm_to_displayintel_dp_is_uhbrdrm_dp_bw_overheadintel_dp_bw_fec_overheaddrm_dp_mst_port_downstream_of_parentintel_hpd_trigger_irqintel_digital_connector_atomic_checkintel_connector_needs_modesetdrm_connector_list_iter_begindrm_connector_list_iter_nextintel_atomic_get_digital_connector_stateintel_atomic_get_crtc_statedrm_atomic_add_affected_planesdrm_connector_list_iter_enddrm_dp_atomic_release_time_slotsintel_cpu_transcoder_mode_validintel_dp_max_link_rateintel_dp_max_lane_countintel_dp_max_link_data_rateintel_dp_link_requiredintel_dp_num_joined_pipesdrm_modeset_lockdrm_dp_calc_pbn_modeintel_dp_has_dscintel_dp_joiner_needs_dscintel_mode_valid_max_plane_sizeintel_dp_dsc_compute_max_bppintel_dp_dsc_get_max_compressed_bppintel_dp_dsc_get_slice_countintel_display_device_enabledintel_display_driver_check_accessintel_dp_flush_connector_commitsdrm_dp_mst_detect_portdrm_dp_mst_edid_readintel_connector_update_modesdrm_edid_freedrm_edid_connector_add_modesintel_connector_unregisterdrm_dp_mst_connector_early_unregisterdrm_dp_mst_connector_late_registerintel_connector_registerintel_dp_initial_fastset_checkdrm_atomic_get_new_mst_topology_state__drm_dev_dbgdrm_dp_send_power_updown_phyintel_dp_sink_enable_decompressiondrm_atomic_get_mst_payload_statedrm_dp_add_payload_part1intel_ddi_enable_transcoder_clockintel_ddi_config_transcoder_funcintel_dsc_dp_pps_writeintel_ddi_set_dp_msaintel_dp_set_powerdrm_dp_mst_topology_queue_probedev_driver_string__SCT__WARN_trapintel_dp_queue_modeset_retry_for_linkintel_ddi_update_active_dpllintel_hdcp_disableintel_dp_sink_disable_decompressiondrm_encoder_cleanupkfreeintel_connector_allocintel_dp_connector_sync_statedrm_dp_mst_get_port_mallocdrm_connector_dynamic_initdrm_dp_mst_dsc_aux_for_portdrm_dp_read_dpcd_capsdrm_dp_read_descintel_dp_get_dsc_sink_capdrm_object_attach_propertyintel_attach_force_audio_propertyintel_attach_broadcast_rgb_propertydrm_connector_attach_max_bpc_propertydrm_connector_set_path_propertyintel_dp_hdcp_initdrm_connector_attach_encoderdrm_connector_cleanupdrm_dp_mst_put_port_mallocintel_connector_freedrm_dp_mst_aux_for_parentintel_crtc_num_joined_pipesintel_dp_supports_dscdrm_atomic_get_old_mst_topology_stateintel_crtc_for_pipe_intel_modeset_primary_pipes_intel_modeset_secondary_pipesintel_crtc_vblank_offintel_disable_transcoderdrm_dp_remove_payload_part1intel_ddi_clear_act_sentintel_dmc_wl_getto_intel_uncoreintel_dmc_wl_putintel_ddi_wait_for_act_sentdrm_dp_check_act_statusdrm_dp_remove_payload_part2intel_vrr_transcoder_disableintel_ddi_disable_transcoder_funcintel_dsc_disableskl_scaler_disableintel_dp_set_infoframesilk_pfit_disableintel_ddi_disable_transcoder_clockintel_ddi_enable_transcoder_funcintel_vrr_transcoder_enabledrm_dp_add_payload_part2intel_enable_transcoderintel_crtc_vblank_onintel_hdcp_enableintel_ddi_wait_for_fec_statusintel_dp_mst_active_streamsintel_dp_mtp_tu_compute_configdrm_atomic_get_mst_topology_statedrm_dp_get_vc_payload_bwdrm_dp_mst_update_slotsintel_dp_needs_8b10b_fecintel_dp_dsc_valid_compressed_bppintel_link_compute_m_ndrm_dp_bw_channel_coding_efficiencyintel_dp_link_symbol_clockintel_dp_supports_fecintel_dp_output_bppintel_dp_effective_data_ratedrm_dp_atomic_find_time_slotsintel_dp_compute_config_limitsintel_dp_limited_color_rangeintel_dp_compute_min_hblankintel_vrr_compute_configintel_dp_audio_compute_configintel_ddi_compute_min_voltage_levelintel_psr_compute_configdrm_dp_dsc_sink_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