ELF>D@@U bHPSHHHHH1ҹbHH1ҹbHH1ҹbHH1ҹbHH []fDUpbSHPHHHHH1ҹbHH []UHPaSHHHaH H@tHH!HH!HH HH HH []UbSHPHHHHH HH H@@H []fD HLPLHHtHwH1ff.fSHHPH]A? t HHtHsH1[[ff.UHPSHHHH H[]DAUATLPUHSH$LL$AHH(ھH(%? €@H(H[D]LA\$A]@AWAVIAUATLPUSL01AHru[]A\A]A^A_IpHcLLj H,+h0l0IL@IIpLH,+h0B,ILIIp1LH,+p0B4I(ff.fUHP1ҹSHHbHHHbH1HbHb%Hҁ H[]=ff.fUHP SHHHH %HHHP HHH HH0HH0@HH߾&[]mff.fU$ HPSHHHHHH0HH0HH HH HH HHH` []fDAV@` AUIATE1USHPH0HH HI H߃ILseEHIA AdDDH%߉ j EIAAuE1Ls%DH I`AAtLrAAu[]A\A]A^U HPSHHHH HH  HHHH HHHH HH  `HH HH  `HH H H HHEH-H[]AT UHPSHHL0H HH H @H$HH HHxHtHH HH0HH0HHHH H H%H A|$tHH[]A\AV AUATE1UHPSHL0HH H @H@HH@H@H HH H̀HALeAAu HH H%HHHP 0HH0H@HH2Hミ H H@HH0xH`HH`HHHH H[]A\A]A^F, HHDDHH[H H HH fDUHPSHH@H HHタ HH0dHH0d HHPHHP H[]HHタ  H̀Hff.USHHPHH0H0@HH0HH0 HH0eHH0e`HHﺶH` HPHHP̀H[]ff.fUSHHPHH0eH0e`H[]fUHPSH0HxtzH+HHDHD @HHPHHP̀H[]HH  H HJff.fUSHHPKHH$H$HHDHHD @HHPHHP̀H[]fAV AUATLPU1SHL0HL L @H LH L̀HAHu0LH0LH@LH@L@HH0xtL`HL`H[]A\A]A^D, LHDDL̀HL H LHEATUSHHPHDHDH @Htt?<v{HHPHP̀H[]A\HHtH{LgPMHH=HLw70HH0H@HAtGH-HH @HHHtH{LgPMt2HH=HLzL'L'ff.U `HPSHHHHH$` HH H `HPHHPH̀Ht H@uHHﺠ H H H HH?HH[ ]H HH  @HH H H @H H8 Hff.fHuH@t H8 xHuHuHuH uHuHuHuH tH@atmttH=H*HƀtEHHHHEHHHNo clock gating settings or workarounds applied. Wrong MCH_SSKPD value: 0x%08x This can cause underruns. drivers/gpu/drm/i915/intel_clock_gating.cdrm_WARN_ON(((&(i915)->__runtime)->step.graphics_step) == STEP_NONE)%s %s: [drm] %s  GCC: (Debian 12.2.0-14+deb12u1) 12.2.0GNU/iG`^`u)@#RKP  @5K Iap }x  pN ) ?U l    x p h `  X$ P; HR 0i (     @ 8  *Yx 1Iegintel_clock_gating.ci965gm_init_clock_gatingi965g_init_clock_gatinggen3_init_clock_gatingi85x_init_clock_gatingi830_init_clock_gatingnop_init_clock_gatinggen6_check_mch_setupdg2_init_clock_gatinggen8_set_l3sqc_credits.constprop.0g4x_disable_trickle_feedg4x_init_clock_gatingchv_init_clock_gatingvlv_init_clock_gatingcpt_init_clock_gatinggen6_init_clock_gatingivb_init_clock_gatingbdw_init_clock_gatinggen9_init_clock_gatingbxt_init_clock_gatingglk_init_clock_gatingcfl_init_clock_gatingskl_init_clock_gatinghsw_init_clock_gatingkbl_init_clock_gatingilk_init_clock_gatingdg2_clock_gating_funcscfl_clock_gating_funcsskl_clock_gating_funcskbl_clock_gating_funcsbxt_clock_gating_funcsglk_clock_gating_funcsbdw_clock_gating_funcschv_clock_gating_funcshsw_clock_gating_funcsivb_clock_gating_funcsvlv_clock_gating_funcsg4x_clock_gating_funcsi965gm_clock_gating_funcsi965g_clock_gating_funcsi85x_clock_gating_funcsi830_clock_gating_funcsnop_clock_gating_funcsgen6_clock_gating_funcsilk_clock_gating_funcsgen3_clock_gating_funcs__UNIQUE_ID_addressable___SCK__WARN_trap_774.0__UNIQUE_ID_addressable___SCK__WARN_trap_773.1.LC2.LC3__x86_indirect_thunk_rax__drm_dev_dbg__x86_return_thunkintel_gt_mcr_read_anyintel_gt_mcr_multicast_write__const_udelaydev_driver_string__SCT__WARN_trapintel_clock_gating_initintel_clock_gating_hooks_init__SCK__WARN_trap:7U7p777 7%777777$7777S 7 87y77:;:<77777g7777%7E7c7|7777*7H7a77777F 7_ 7} 7 7 7' 7 7 7 7 7 7' 7@ 7` 7y 7 7 7 73 7L 7l 7 7 7 7 7 7( 7I 7o 7 7 77,7E7c77777 737Q7{7777737Q777777K7i77777*7H7f777Z7z7777:7X7q777747M7k777777^7z77777M7= >77 7@7_=i p x>77717J7h7777767O7o7 2 2 2  2 2x) 2p8 2hG 2`V 2Xe 2Px 2H 20 2( 2  2 2 2 2@ 28 27E7D77%7_889777^97U 97277 777?7o7779PP (00p8@@HP0X`h p` x  `56m56@`` (0@8@p HP X`h px AA.symtab.strtab.shstrtab.rela.text.data.bss.rela__patchable_function_entries.rodata.str1.8.rodata.str1.1.rela__bug_table.rela.discard.annotate_data.rela.rodata.rela.discard.addressable.comment.note.GNU-stack.note.gnu.property @%@+&e,e6h1@>S2@b2-v= q@0A ]@A0 p@A @C00 (HH h07 %xD