ELF>@@'&=t 1 ATUSHHH4$IHH$HMIHH1 H[]A\ATUHSHHtLHG HHt:H9Cu}t HcHrHS81[]A\IHHuMHHH1 1[]A\DAUATL$7USL9HIL9SHHf/I9,A}qUu3fwIDHIt8Ht[]A\A]fw#fHUHuHUftafuuHUyHHL961[]A\A]A}pHdUHuHUuHUUHuHU1HHH1Tff.@S1H1HeHHD$1HH$uH<$_%HD$eH+u H[fDATAUSHXHL`HH+IH@HkT@ LHH C%LE1HHHLCPH3 CPF1H HH HHu.1 H H Hi'H)H9rHHt[HH]A\HH7ff.U1HHSH1u[]H]@[]f ff.fSHXH~ACdILCrǹ!1HÅu[H[HAWLcHAVAUI1ATI̹USHHeHH$1Hl$HHDHHc1u,H$eH+HĈ[]A\A]A^A_HE1L1HHHtT8uGE1HHLHJcLlLd@sH{H߉D$D$iHWff.fATUSH eHHD$1HD$u$1HD$eH+`H[]A\1ҹHHH\$HtH@Hl$HHD$ÅHL$HHÅD$|1HHo1HHAąu31HHAątE1HHv1HHD]1HHGH1HH Åu1HH1ɉÅu{HH1HHÅy 1nHD$E1E1PHH޿ZuDH\$$HHm!H gHff.AWAVLvTAULATIUSH II$X4u#LLH []A\A]A^A_HHtID$H%?HD$D$E11E1D$D$ I$DT$T$HLLT$tyT$|$ A x HcH<t$IWRHMfHIEAA_AXAD$LHcHH9¸CIHHH|$I $‰HHHp H)Al$L$I $HL I$L$ L8Iww HcH<AAAfAA|$D$HWHRAWHT$ HEHD$J~6HA/vJЃ`HcH<pI$P4~HcɉA4AfAI0AMHAYZHgHHfHH=Ht1B H?Htf9G4uHJH9OuHt ff.HH=Ht]B H?HtKf9G4uHrH9wuHt6G6u)HG(Ht HcW0~HHHHuHH9u11ff.HGH:uATIUSHHuxHtsH@8HH@H@8HuHcźHHH H@  HHu =u 1*1HLaHHCHfifAMt [H]A\Hu HX8HtHCHcH@HȈPS8PS8PHCHxuAHC뭸& HHH5HH@HCHfifAmHH1ff.fH9s{ATIUHSH#<t*<v HCHL9sHw҃ECHL9rHcEtHHHf9C4uHOH9KuHt)HCHHBHH"HCH;1[1f9OuJAVAUATUHHSHH9s"L/ILM}A<v HH9r1H[]A\A]A^LGDUIE;T$uMAD$A9uBEEXHUO[ID$O\DpD8ruHHL9tiD0D82tAvAD$HH@LPA9WU:PJM:H=DHDL$MDL$uI$xIufxFuyE~McIIHHt#HI9u H[]A\A]A^I$IH@CI$@8C HI$xItHHuHHff.UHSHHt9C6u'HsK4HDK0LC(VHHuHHuHx []yu[]fDUSHHt 1[]H8lHHtHHtlH5HtK}f9~4u5HcV0~-HF(HH HHtHUHH9tWHH9uH6HuH1HHHtH[]HHH1f9wt~HcSHHHHtHHH9tHH9u1[HH[f.UHSHHtFC6tHCPHEH;t+HcC0HHt*HVHr8HuHHu1H[]H{(HH 8HHHt Hz`t(HH9uHFHp8HuHHbHH9uH[]AWAVAUATUSHxHXHt$@eHHD$p1HD$PHD$XHD$`HD$hHAփIHH%HEHD$8AFD$HAFD$LHl$HI9k s HHHH9k rI‹CD$ DD$0HI#D$ HMII HEE1AELT$LT$@Ld$Dd$ BT%HcDHLI)‰HHHCHL@JLIJLL)I)Dr$1ɉσI9I89r$HCHcLNLFHNHD9_LT$Ld$T$0HsH|$8HHSH|$PHHHH+5H֋T$0DHD$`Ht$XHt$PH|$PHD$hHcHSH2JtHJtHrHH)AH)AArA1҉уLLD9rT$LSDDs SI<$HSH4Hы6Dt$4MH$LT$(dEAEtIЉ9D$ mA@A HHHSH$HHы6MX1H<$AF%ID$@Ń<8IDx4ApcI|$IHIXEHPA[A@"A HJHHЃ<w H4H1ɋD$AF%IXHHBHHHЃ<w H4HeH_eHHt HxHt$L\$ L$L\$ L$e IH耋D,IEA)A)IT$HH I@HL$p4HHL$T$It$IcH8uADAEA)D9uHID$H<$<8MLT$(Dt$4HSI P4HaHHHT$H0HT$HHHT$ H HL$HT$ HL$HHHT$ HL$HT$ HL$zLHtHx`uH8 MLT$(Dt$4HSMLT$(Dt$41t$ )HEt,2)HKHA9sHcSHK4HЅu(sC )HcЉCu9uLH{HD$peH+Hx[]A\A]A^A_15MLT$(Dt$4Hʽ1볋|$0MHcºIuLT$(MDt$4HcHHH1H0H|1H|0HpHH)H)r1ǃL9L>9rL$I$P4HHSL$|H5fH(1ɺeHHD$ 1HH$HD$HD$HD$HD$ eH+u H(f.I9H0HH(eHHD$ 1L H HD$HD$H HHD$H ѺHH $1HD$ eH+u H(IH(HI8eHHD$ 1IQ?HHHD$HD$HH0H H0H|$1Ƀ@LL H HH кHH$HD$ eH+u H(ff.H(eH HL$ 1ɋOPH$HD$HD$HD$xHD$ eH+H(LHEtAI AIIIL HHHL$HD$f HD$HcHCH HH HfH H4H 1H кHH$Iff.@H(HeH HL$ 1H$HD$HD$HD$MH HH It}IIAMIIH IIHHujEɃ?HH6IH$I I LL$1ɺHHD$ eH+u3H(H&H$ϐ 1Hʐ IL!ATUSH(eHHD$ 1GP\$HHD$HD$HD$x HD$ eH+H([]A\HIHMHH AH!HH HfH L H4H ȉH HH$HHLuOu%LH%1ɺHHHD$O4H)ك HL HH%HHtLHfHH H(eHHD$ 1H HHD$H HHD$HH $1HD$HD$ eH+u H(D1G uAUIATIUHoTSHHHHHHHH耋LH L 9u6HH 9t1 H H Hi'H)H9rʋCPH;%CPG1H HH HHt.1 H H Hi'H)H9rHHu[H]A\A]HG USHXHt 1[]H=( HXHHHH#C  HHHH HtAHE H=HEHt;EH_HHǃX:H}H1HXff.@ATUSHGHXG;Cdt:;Cht<;Clu>(LcTLHH1HH+E[L]A\8νkff.ATUSHGHXG;Cdt=;Cht?;CluA(LcTLHHƸHH+E[L]A\8˽AWAVAUATIUSHHtH@HX;kdt];khtk;kluy4A0A,L{TLL3HAD$AA$L+AEAD$H+E[L]A\A]A^A_DA@A<뫽AAff.Gdt1 fAUATLcHUSHHteI HHtPHk8EduJB(9uHuR}dHHEP4HEP4HHu1HH=w H[]A\A]HsHff.G t#SHXHtH[1[[ff.Bf1%  ؛Lˁ]GPL4DMAR: [Firmware Bug]: Your BIOS is broken; ANDD object name is not NUL-terminated BIOS vendor: %s; Ver: %s; Product Version: %s 6DMAR: ANDD device: %x name: %s 4DMAR: [Firmware Bug]: Your BIOS is broken; DMAR reported at address %llx%s! BIOS vendor: %s; Ver: %s; Product Version: %s 4DMAR: [Firmware Bug]: Your BIOS is broken; RHSA refers to non-existent DMAR unit at %llx BIOS vendor: %s; Ver: %s; Product Version: %s DMAR: [Firmware Bug]: Invalid 0-length structure 4DMAR: [Firmware Bug]: Record passes table end 6DMAR: DRHD base: %#016Lx flags: %#x 6DMAR: RMRR base: %#016Lx end: %#016Lx 6DMAR: RHSA base: %#016Lx proximity domain: %#x DMAR: Unknown DMAR structure type %d 4DMAR: No handler for DMAR structure type %d 4DMAR: Can't validate DRHD address: %llx DMAR hardware is malfunctioning 4DMAR: Failed to locate _DSM method. 4DMAR: [Firmware Bug]: No DRHD structures in buffer returned by _DSM method 3DMAR: DRHD: handling fault status reg %x 3DMAR: [INTR-REMAP] Request device [%02x:%02x.%d] fault index 0x%llx [fault reason 0x%02x] %s 3DMAR: [%s NO_PASID] Request device [%02x:%02x.%d] fault addr 0x%llx [fault reason 0x%02x] %s 3DMAR: [%s PASID 0x%x] Request device [%02x:%02x.%d] fault addr 0x%llx [fault reason 0x%02x] %s 6DMAR: Host address width %d 4DMAR: [Firmware Bug]: No DRHD structure found in DMAR table 4DMAR: Unsupported device scope 3DMAR: Failed to allocate seq_id 6DMAR: %s: No supported address widths. Not attempting DMA translation. 3DMAR: Cannot get a valid agaw for iommu (seq_id = %d) 3DMAR: Cannot get a valid max agaw for iommu (seq_id = %d) 6DMAR: %s: reg_base_addr %llx ver %d:%d cap %llx ecap %llx DMAR: Cannot alloc PMU for iommu (seq_id = %d) 6DMAR: [Firmware Bug]: RMRR entry for device %02x:%02x.%x is broken - applying workaround 4DMAR: Device scope type does not match for %s 3DMAR: Failed to find handle for ACPI object %s 3DMAR: Failed to get device for ACPI object %s 6DMAR: ACPI device "%s" under DMAR at %llx as %02x:%02x.%d 4DMAR: No IOMMU scope found for ANDD enumeration ID %d (%s) 6DMAR: Parse DMAR table failure. 6DMAR: No DMAR devices found 3DMAR: VT-d detected Invalidation Queue Error: Reason %llx3DMAR: VT-d detected Invalidation Time-out Error: SID %llx3DMAR: VT-d detected Invalidation Completion Error: SID %llx3DMAR: QI HEAD: %s qw0 = 0x%llx, qw1 = 0x%llx 3DMAR: QI PRIOR: %s qw0 = 0x%llx, qw1 = 0x%llx 6DMAR: Invalidation Queue Error (IQE) cleared 6DMAR: Invalidation Time-out Error (ITE) cleared 6DMAR: Invalidation Completion Error (ICE) cleared 3DMAR: Invalid input npages = %ld 4DMAR: Invalidate non-aligned address %llx, order %d 3DMAR: DRHD %Lx: failed to enable fault, interrupt, ret %d Interrupt Entry Cache InvalidationPASID-based IOTLB InvalidationPASID-based Device-TLB InvalidationDetected reserved fields in the decoded interrupt-remapped requestInterrupt index exceeded the interrupt-remapping table sizePresent field in the IRTE entry is clearError accessing interrupt-remapping table pointed by IRTA_REGDetected reserved fields in the IRTE entryBlocked a compatibility format interrupt requestBlocked an interrupt request due to source-id verification failureSM: Invalid Root Table AddressSM: TTM 0 for request with PASIDSM: TTM 0 for page group requestSM: Error attempting to access Root EntrySM: Present bit in Root Entry is clearSM: Non-zero reserved field set in Root EntrySM: Error attempting to access Context EntrySM: Present bit in Context Entry is clearSM: Non-zero reserved field set in the Context EntrySM: DTE field in Context Entry is clearSM: PASID Enable field in Context Entry is clearSM: PASID is larger than the max in Context EntrySM: PRE field in Context-Entry is clearSM: RID_PASID field error in Context-EntrySM: Error attempting to access the PASID Directory EntrySM: Present bit in Directory Entry is clearSM: Non-zero reserved field set in PASID Directory EntrySM: Error attempting to access PASID Table EntrySM: Present bit in PASID Table Entry is clearSM: Non-zero reserved field set in PASID Table EntrySM: Invalid Scalable-Mode PASID Table EntrySM: ERE field is clear in PASID Table EntrySM: SRE field is clear in PASID Table EntrySM: Error attempting to access first-level paging entrySM: Present bit in first-level paging entry is clearSM: Non-zero reserved field set in first-level paging entrySM: Error attempting to access FL-PML4 entrySM: First-level entry address beyond MGAW in Nested translationSM: Read permission error in FL-PML4 entry in Nested translationSM: Read permission error in first-level paging entry in Nested translationSM: Write permission error in first-level paging entry in Nested translationSM: Error attempting to access second-level paging entrySM: Read/Write permission error in second-level paging entrySM: Non-zero reserved field set in second-level paging entrySM: Invalid second-level page table pointerSM: A/D bit update needed in second-level entry when set up in no snoopSM: Address in first-level translation is not canonicalSM: U/S set 0 for first-level translation with user privilegeSM: No execute permission for request with PASID and ER=1SM: Address beyond the DMA hardware maxSM: Second-level entry address beyond the maxSM: No write permission for Write/AtomicOp requestSM: No read permission for Read/AtomicOp requestSM: Invalid address-interrupt addressSM: A/D bit update needed in first-level entry when set up in no snoopPresent bit in root entry is clearPresent bit in context entry is clearNext page table ptr is invalidnon-zero reserved fields in RTPnon-zero reserved fields in CTPnon-zero reserved fields in PTEPCE for translation request specifies blockingCannot alloc PMU for iommu (seq_id = %d) Unknown DMAR structure type %d [Firmware Bug]: Invalid 0-length structure ATLgUHS_LHcHH9tuLH1[]A\HHHHHH1 ff.fS 1HHeHH$1H|$8D$HD$HD$HD$HD$ HD$(HHD$HHD$0HD$@fD$xHHtos$@ HsH{0HT$H0Åt!H$eH+u[HĈ[D$uHHHHuHf=ATUSt"HH=tHHHIH"H=HHt&HGHCHL'HoHHHuH1[]A\1AVAUATUSHeHHD$NHH=,HHBHj0HH9rEHŋBHH9kf}uH]HHH$HH<$IH L5MIIFPL`HI9A<$A:L$IEL$ED$AL$IVHHIcN0~#Iv(H1HHHHH9u HT$eH+_H[]A\A]A^AT$II9EM6IIHuI`HH1HھHHu1HHHHHtHI`AT$I`PAD$AT$IN( ЈD I^(HHHHHHHHHff.@HHfUStO؉[]jŅx"HH=t5[]t)H؉-[]HSHeHH$1H|$HD$HHD$x1HHu)H=HwHT$H0H0tFH=HtHH$eH+HĈH[ uJt11HHH$u#H<$_%tHHGH6f.HHt @%16DMAR: ATSR flags: %#x 6DMAR: SATC flags: 0x%x DMAR returns all onesdrivers/iommu/intel/dmar.c3DMAR: No free IRQ vectors 3DMAR: Can't request irq UnknownDMA ReadDMA Write4DMAR: Unable to map DMAR 4DMAR: Invalid DMAR haw dmar%d3DMAR: Can't reserve memory 3DMAR: Can't map the region 3DMAR: Failed to map %s &iommu->iopf_lock&iommu->did_lock%sUNKNOWNdrivers/iommu/intel/iommu.hContext-cache InvalidationIOTLB InvalidationDevice-TLB InvalidationInvalidation WaitPASID-cache InvalidationPage Group ResponseSM: Invalid Context EntrySoftwareInvalid context entryAccess beyond MGAWPTE Write access is not setPTE Read access is not setRoot table address invalidContext table ptr is invaliddmarATUHSHHt\Ht1HHtjL`HXHL!Ht?1[]A\HHt9L`HXHH}HHuH?       dmar_faultqi_desc_dev_iotlb_pasiddmar_walk_remapping_entriesalloc_iommua^QGCC: (Debian 12.2.0-14+deb12u1) 12.2.0GNUD _   p88p84E>Y@fz0mP R@ @mh # (@p@ [8s N  @p8JP#z?@UnHy   B Kzo0j(>M\sm{ %7=Q(bm*?@cS^et 9Lcs ( 5 M ]  s  `f        * 6  Q g  0w  V          " 3 B M _ o     &f p' ( ( )" +G; p,{P -6 .` z @/e /h @0  1 @1     02B$  @#4 2D 2 W p dmar.c__initcall__kmod_dmar__762_2137_dmar_free_unused_resources7dmar_free_unused_resources__export_symbol_dmar_platform_optindmar_parse_one_anddwarn_invalid_dmar__already_done.11dmar_parse_one_rhsadmar_walk_remapping_entries__UNIQUE_ID_ddebug717.12__UNIQUE_ID_ddebug715.13dmar_validate_one_drhd__dmar_enable_qidmar_get_dsm_handledmar_hp_guiddmar_msi_reg.part.0dmar_set_interrupt.part.0dmar_walk_dsm_resourceres_type.0dmar_device_hotplugdmar_parse_one_drhddmar_hp_add_drhddmar_hp_remove_drhddmar_hp_release_drhd__func__.1rs.2dma_remap_fault_reasonsdma_remap_sm_fault_reasonsirq_remap_fault_reasonsparse_dmar_tabledmar_alloc_pci_notify_infodmar_dev_scope_statusdmar_pci_notify_info_bufdmar_seq_ids__key.8__key.7__UNIQUE_ID_ddebug733.10dmar_free_drhddmar_pci_bus_nbdmar_pci_bus_add_dev.isra.0dmar_pci_bus_notifierdmar_table_initialized.9CSWTCH.166__func__.3_rs.4__func__.5__func__.6__UNIQUE_ID___addressable_dmar_platform_optin770__UNIQUE_ID___addressable_dmar_free_unused_resources763__UNIQUE_ID___addressable___SCK__tp_func_qi_submit650.14__UNIQUE_ID___addressable___SCK__preempt_schedule_notrace66.15.LC30.LC18.LC67strnlen_printk__x86_return_thunkdmi_get_system_infoadd_taintdmar_drhd_unitspxm_to_nodenode_states__x86_indirect_thunk_rax__dynamic_pr_debug__ref_stack_chk_guardacpi_get_tableacpi_put_table__stack_chk_failearly_ioremapearly_iounmappage_offset_base_raw_spin_lock_irqsavetsc_khz_raw_spin_unlock_irqrestorepanicphys_baseacpi_check_dsmdmar_alloc_hwirqdmar_faultrequest_threaded_irqacpi_evaluate_dsmkfreeintel_iommu_enableddmar_global_lockdown_writedmar_parse_one_atsrdmar_release_one_atsrup_writedmar_check_one_atsracpi_walk_namespace___ratelimitdmar_tbldmar_parse_one_rmrrdmar_parse_one_satcdmar_iommu_hotplug__kmalloc_noprofdmar_alloc_dev_scopedmar_free_dev_scopeput_devicememcpykmalloc_caches__kmalloc_cache_noprofida_alloc_rangesnprintfiomem_resource__request_region__release_region__mutex_initalloc_iommu_pmuintel_iommu_smida_freeiommu_calculate_agawiommu_calculate_max_sagawintel_iommu_groupsiommu_device_sysfs_addintel_iommu_opsiommu_device_registeriommu_pmu_registeriommu_device_sysfs_removefree_iommu_pmufree_irqdmar_free_hwirqiommu_free_pagesida_destroyiommu_pmu_unregisteriommu_device_unregisterpci_bus_typebus_unregister_notifiersynchronize_rcudmar_insert_dev_scopedmar_iommu_notify_scope_devdmar_remove_dev_scopedmar_find_matched_drhd_unit__rcu_read_lock__rcu_read_unlockdmar_dev_scope_initacpi_get_handleacpi_fetch_acpi_devpci_get_devicepci_dev_putdmar_register_bus_notifierbus_register_notifierdmar_table_initdetect_intel_iommuno_iommuiommu_detecteddmar_disabledpci_request_acsintel_iommu_initx86_initintel_iommu_shutdownx86_platformqi_submit_sync__tracepoint_qi_submit_raw_spin_unlock_raw_spin_lockcpu_number__cpu_online_mask__preempt_count__SCT__tp_func_qi_submit__SCT__preempt_schedule_notracedevice_rbtree_findpci_device_is_presentqi_global_iecqi_flush_contextqi_flush_iotlbqi_flush_dev_iotlbqi_flush_piotlbqi_flush_dev_iotlb_pasidqi_flush_pasid_cachedmar_disable_qiiommu_alloc_pages_node_szdmar_msi_unmaskdmar_msi_maskdmar_msi_writeirq_get_irq_datadmar_set_interruptenable_drhd_fault_handlingdown_readnuma_node__per_cpu_offsetup_readdmar_reenable_qidmar_ir_supportdmar_device_adddmar_device_remove__SCK__tp_func_qi_submit__SCK__preempt_schedule_notrace;7;AENE[Eo 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H .XI.r,X.s..rL.s._ //_o/U/UT00UN1 aU1\1Gc1 Gl1 x1 G1 1\1 G1a1 a12 ( 2CI2!FFDWDDlDDWDDrDD=D*D D l D l D DDoD mDDD+D_DDD0D D&DdDD&DmDDDQDD &DM'D'D(D-)D*Dm+D,D -D.WB.D.D/W0W0W1D1DY2Dc2Dn2DP@GGaa A0BC HC]EjEwE CF iL  j  c  - 36 kB>LM[ix @}ClL `C Ci C O&`4{BGH GQ PX ]d a}bG G G aeL|G% G2i8xG G$ 8)C]xsL G xCi  !(  2_qi| Ci| CiO P 8_Ge Gm C CL  ab i! 3&M1iOlZidNkiL a 3MN   C"OGiSDDDDDMDzDDeXD_D `  (08@H PX` h p x0  0 00P    &`'( (()0+8`,@,H.P0/X/`00h1p01x 2 022G:b: $h(:*0 4#8 /PDQ`RzS 8 9 C[D ` (a 0c 8@HP XX*`*h*p*x**? ?a ?$(?0 Y4?<*@?H*L@h ( 08 @  `    8  ( 0 8@HPX` h pHxx8p (@0p8@HPX`hpxP (0P8@HPHX`h(phx X0h @5HP8X>`Thgpx`A 5K8@5HKP@px5K`.symtab.strtab.shstrtab.rela.text.rela.data.bss.rela.initcall7.init.rela.export_symbol.rodata.str1.8.rela.init.text.rela__patchable_function_entries.rodata.str1.1.rela__jump_table.rela.ref.text.rela.discard.annotate_insn.rela__bug_table.rela.rodata.rela.discard.addressable.rela__dyndbg.data..once.init.data.rodata.cst2.comment.note.GNU-stack.note.gnu.property @2@x*$+3 &@`x$13` ;36@ج$P3K@$_23sLcn@ $ T ~@ȹ$ 2VpY@@ $Y@$gZ@$ZT@PP$`[ @ $`  @`$)0`$@ $2`>`I`V0`(_aoa 8a %A Xt