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This could expose security risk for tboot 5DMAR: Unknown option - '%s' 4DMAR: %s: Unexpected iotlb invalidation type 0x%llx DMAR hardware is malfunctioning DMAR: TLB flush request %Lx, actual %Lx 4DMAR: %s: Unexpected context-cache invalidation type 0x%llx DMAR: %s: Number of Domains supported <%d> 6DMAR: %s: Using Register based invalidation 6DMAR: %s: Using Queued invalidation DMAR: Disabling IOMMU for graphics on this chipset DMAR: Skipping IOMMU quirk for dev [%04X:%04X] on untrusted PCI link DMAR: Please check with your BIOS/Platform vendor about this DMAR: Forcing write-buffer flush capability DMAR: BIOS has allocated no shadow GTT; disabling IOMMU for graphics DMAR: Disabling batched IOTLB flush on Ironlake DMAR: Skip IOMMU disabling for graphics 3DMAR: Allocating root entry for %s failed DMAR: failed to run vt-d quirk 4DMAR: [Firmware Bug]: BIOS assigned incorrect VT-d unit for Intel(R) QuickData Technology device DMAR: PASID table allocation failed 4DMAR: %pGg allocation from offline node %d 3DMAR: %s: iommu width (%d) is not sufficient for the mapped address (%llx) 3DMAR: Read-only mapping is disallowed on the domain which serves as the parent in a nested configuration, due to HW errata (ERRATA_772415_SPR17) 2DMAR: ERROR: DMA PTE for vPFN 0x%lx already set (to %llx not %llx) DMAR: Set context mapping for %02x:%02x.%d tboot: IOMMU setup failed, DMAR can not resume! IOMMU setup failed, DMAR can not resume! 3DMAR: %s: No free domain ids 3DMAR: [Firmware Bug]: No firmware reserved region can cover this RMRR [%#018Lx-%#018Lx], contact BIOS vendor for fixes 4DMAR: [Firmware Bug]: Your BIOS is broken; bad RMRR [%#018Lx-%#018Lx] BIOS vendor: %s; Ver: %s; Product Version: %s 6DMAR: Intel-IOMMU force enabled due to platform opt in tboot: Failed to initialize DMAR table tboot: Failed to initialize DMAR device scope 4DMAR: Translation was enabled for %s but we are not in kdump mode 6DMAR: Translation already enabled - trying to copy translation structures 3DMAR: %s: Failed to copy context table for bus %d 3DMAR: Failed to copy translation tables from previous kernel for %s 6DMAR: Copied translation tables from previous kernel for %s Your BIOS is broken; DMA routed to ISOCH DMAR unit but no TLB space. BIOS vendor: %s; Ver: %s; Product Version: %s 4DMAR: Recommended TLB entries for ISOCH unit is 16; your BIOS set %d tboot: Failed to initialize DMARs 3DMAR: Initialization failed 6DMAR: IOMMU batching disallowed due to virtualization 6DMAR: Intel(R) Virtualization Technology for Directed I/O 4DMAR: ACPI name space devices didn't probe correctly Set context mapping for %02x:%02x.%d %s: Number of Domains supported <%d> TLB flush request %Lx, actual %Lx HS?HtJ;ouP{nuJHHHH<,u CH<,tu[;ou.{fu({fu"H뙺HHHHHHHHHHHH HHHHHHqHVH;HH'H ff.ATUHSH_LgIt$L9HH=8 HHHhHEHS0H}uHCHEHHC S0HC(t HHHHXHCH1[]A\LHHIHHuHUMHIH1 Hf.UHAWAVAUATSHxeH%(HD$p1tD%1E1HDEL%II"M,$ItHo 9uʀH6D Et+HHtH{8G`tHHuHHH{8HHu1H5DHugH6Ht[F6u~0~5HV(1HHtHx`%f~H9uF6ƒV6EtF6L5IuM6IM~8AF6DEt>H IG H H!H9uH#9G‰LLIHAy AtH=LA1HIHX =IAD$1t IG H+8D$ LT$HLT$HHIa HHQ LT$HLT$HHI, I LT$HHHHHIGrHD$Ht Ld$0E1Lt$L$$HL$ H|$HDl$(HD$PHD$XXCD-KT-D$HL$0H|$HD$,AHHD$`HAHD$hHD$ HHD$@;1E1E1H|$`@t H~EAD$teC$ MtHD$@LAG D$,MtLL\$8L\$8A~H|$h@t HIHD$0ILT$HIHL$ HLt$L$$LT$@HL$H1LT$@1HL$HH1<Ht8ALIL+ MLHI0MHcHHt/HHH+=MHHID0HHHM`HщH]ѺIHhA eD11IH4H(L\$8H:H<L\$8'IH:H<L\$8L+II LLLD$HIcAHMcLD`HI6H HL$PHRHT$XD$PtJIWDL$YLLHHu IL IH HHD$PHT$XI3IT3AMJIcnL߾L\$8L\$8NDl$LLT$(Ht$H\E1E1HHH2HHL$HH|$HIAG LHt$H0\$,D$H\$ HLAG t LLLHHhHD[LIGrAHH2L%Iu,M$$ItAD$6uMl$8LLԋ Hp9HHu(HHtC6uLc8LL1Ҿ>:D$`HHtH1Ҿ.4HHtYFHHT$`H߅t$`@u t$`tvHL%Iu5ufM$$It~Ml$8AD$6uLAE# t*HLH>LÅt+AE`tL뉃H9qHIHHHHC6u|Lc8AD$t2ID$ LHH.H/H1Ш{M$XMD$rH1HLL1HLHHnHHuHHC6uC0~E1IcHHC(L Mt I|$`t AD;k0}M$ILM<$M9u vM?M9tnItLHHHuHAD$`tLHHt,Lc8C6uA$uLLOH1H |=eIGrHD$Ht$HLA5K>S0[Ol00pO )?X5l~p8 '. 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#6DLWie0Z1^0Ij`dbd1iommu.c__export_symbol_intel_iommu_enabledquirk_iommu_igfxquirk_iommu_rwbfquirk_calpella_no_shadow_gttquirk_igfx_skip_te_disableintel_svm_domain_allocintel_iommu_is_attach_deferrediommu_enable_pci_caps__iommu_calculate_agawintel_iommu_enforce_cache_coherencyintel_iommu_iotlb_sync_mapintel_flush_iotlb_allintel_iommu_device_groupintel_iommu_capableno_platform_optinintel_iommu_tboot_noforcedisable_igfx_iommuintel_iommu_superpage__UNIQUE_ID_ddebug642.10iommu_disable_translationiommu_skip_te_disableiommu_suspend__iommu_flush_contextiommu_enable_translationdmar_find_atsrdmar_atsr_unitsiommu_init_domains__UNIQUE_ID_ddebug644.9iommu_set_root_entrydisable_dmar_iommudomains_used_showdomains_supported_showecap_showaddress_showversion_showdevice_def_domain_typeiommu_identity_mappingiommu_disable_protect_mem_regions.part.0intel_iommu_init_qidomain_detach_iommu.part.0iommu_superpage_capabilitydma_pte_list_pagetables.isra.0dma_pte_clear_leveldomain_unmapintel_iommu_get_resv_regionsdmar_rmrr_unitsiommu_put_pages_listintel_iommu_domain_freeintel_iommu_tlb_syncintel_iommu_hw_inforwbf_quirkiommu_alloc_root_entryintel_iommu_set_dirty_trackingintel_iommu_probe_device__already_done.11dmar_satc_unitsdma_pte_free_levelintel_iommu_domain_alloc_paging_flags__compound_literal.2intel_dirty_opscopied_context_tear_downpfn_to_dma_pteintel_iommu_iova_to_physintel_iommu_unmap_pagesintel_iommu_read_and_clear_dirtyintel_iommu_map_pagesdumps.3__func__.4_rs.5__func__.6intel_iommu_release_devicecontext_flip_priintel_iommu_dev_disable_featintel_iommu_dev_enable_featfree_dmar_iommudomain_context_clear_onedomain_context_clear_one_cbdomain_context_mapping_one__UNIQUE_ID_ddebug653.8domain_context_mapping_cbiommu_resumeforce_oncontext_setup_pass_through.isra.0context_setup_pass_through_cbiommu_syscore_ops__already_done.7blocking_domain_attach_devidentity_domain_attach_devintel_iommu_attach_deviceblocking_domain_set_dev_pasididentity_domain_set_dev_pasidintel_iommu_set_dev_pasid__func__.0__func__.1__func__.2__UNIQUE_ID___addressable_quirk_igfx_skip_te_disable774__UNIQUE_ID___addressable_quirk_calpella_no_shadow_gtt773__UNIQUE_ID___addressable_quirk_calpella_no_shadow_gtt772__UNIQUE_ID___addressable_quirk_calpella_no_shadow_gtt771__UNIQUE_ID___addressable_quirk_calpella_no_shadow_gtt770__UNIQUE_ID___addressable_quirk_iommu_rwbf769__UNIQUE_ID___addressable_quirk_iommu_rwbf768__UNIQUE_ID___addressable_quirk_iommu_rwbf767__UNIQUE_ID___addressable_quirk_iommu_rwbf766__UNIQUE_ID___addressable_quirk_iommu_rwbf765__UNIQUE_ID___addressable_quirk_iommu_rwbf764__UNIQUE_ID___addressable_quirk_iommu_rwbf763__UNIQUE_ID___addressable_quirk_iommu_igfx762__UNIQUE_ID___addressable_quirk_iommu_igfx761__UNIQUE_ID___addressable_quirk_iommu_igfx760__UNIQUE_ID___addressable_quirk_iommu_igfx759__UNIQUE_ID___addressable_quirk_iommu_igfx758__UNIQUE_ID___addressable_quirk_iommu_igfx757__UNIQUE_ID___addressable_quirk_iommu_igfx756__UNIQUE_ID___addressable_quirk_iommu_igfx755__UNIQUE_ID___addressable_quirk_iommu_igfx754__UNIQUE_ID___addressable_quirk_iommu_igfx753__UNIQUE_ID___addressable_quirk_iommu_igfx752__UNIQUE_ID___addressable_quirk_iommu_igfx751__UNIQUE_ID___addressable_quirk_iommu_igfx750__UNIQUE_ID___addressable_quirk_iommu_igfx749__UNIQUE_ID___addressable_quirk_iommu_igfx748__UNIQUE_ID___addressable_quirk_iommu_igfx747__UNIQUE_ID___addressable_quirk_iommu_igfx746__UNIQUE_ID___addressable_quirk_iommu_igfx745__UNIQUE_ID___addressable_quirk_iommu_igfx744__UNIQUE_ID___addressable_quirk_iommu_igfx743__UNIQUE_ID___addressable_quirk_iommu_igfx742__UNIQUE_ID___addressable_quirk_iommu_igfx741__UNIQUE_ID___addressable_quirk_iommu_igfx740__UNIQUE_ID___addressable_quirk_iommu_igfx739__UNIQUE_ID___addressable_quirk_iommu_igfx738__UNIQUE_ID___addressable_quirk_iommu_igfx737__UNIQUE_ID___addressable_quirk_iommu_igfx736__UNIQUE_ID___addressable_quirk_iommu_igfx735__UNIQUE_ID___addressable_quirk_iommu_igfx734__UNIQUE_ID___addressable_quirk_iommu_igfx733__UNIQUE_ID___addressable_quirk_iommu_igfx732identity_domain__compound_literal.1blocking_domain__compound_literal.0intel_iommu_groupintel_iommu_attrsdev_attr_versiondev_attr_addressdev_attr_capdev_attr_ecapdev_attr_domains_supporteddev_attr_domains_used__setup_intel_iommu_setup__setup_str_intel_iommu_setup__UNIQUE_ID___addressable_intel_iommu_enabled618__UNIQUE_ID___addressable___SCK__might_resched17.12.LC41.LC0__x86_return_thunkpci_bus_typepci_ats_page_alignedpci_enable_atsintel_iommu_sm__stack_chk_fail_raw_spin_lock_irqsave_raw_spin_unlock_irqrestoreintel_pasid_setup_page_snoop_controlcache_tag_flush_range_npcache_tag_flush_allgeneric_device_grouppci_device_groupdmar_platform_optindmar_disabledstrcspnstrncmpiommu_dma_forcedaciommu_set_dma_strict__iommu_flush_iotlbtsc_khz__dynamic_pr_debugpanicdmar_drhd_units__x86_indirect_thunk_raxmemcmpbitmap_zallocpage_offset_baseqi_flush_pasid_cachephys_base__bitmap_weightsysfs_emitdmar_enable_qiqi_flush_contextqi_flush_iotlbdmar_faultdmar_disable_qi_raw_spin_lockxa_loadxa_erasekfr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