// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for the Genmai board * * Copyright (C) 2013-14 Renesas Solutions Corp. * Copyright (C) 2014 Wolfram Sang, Sang Engineering */ /dts-v1/; #include "r7s72100.dtsi" #include #include #include / { model = "Genmai"; compatible = "renesas,genmai", "renesas,r7s72100"; aliases { serial0 = &scif2; }; chosen { bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; flash@18000000 { compatible = "mtd-rom"; reg = <0x18000000 0x08000000>; bank-width = <4>; device-width = <1>; clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>; power-domains = <&cpg_clocks>; #address-cells = <1>; #size-cells = <1>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "user"; reg = <0x00000000 0x04000000>; }; partition@4000000 { label = "user1"; reg = <0x04000000 0x04000000>; }; }; }; keyboard { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&keyboard_pins>; key-1 { /* JP3 must be set to 1-2 (default) */ interrupts-extended = <&irqc 6 IRQ_TYPE_EDGE_BOTH>; linux,code = ; label = "SW6,SW7"; wakeup-source; }; }; leds { /* Needs SDHI0 to be disabled */ status = "disabled"; compatible = "gpio-leds"; led1 { gpios = <&port4 10 GPIO_ACTIVE_LOW>; }; led2 { gpios = <&port4 11 GPIO_ACTIVE_LOW>; }; }; memory@8000000 { device_type = "memory"; reg = <0x08000000 0x08000000>; }; cvcc2: regulator-mmc { compatible = "regulator-fixed"; regulator-name = "Cvcc2"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; &bsc { flash@0 { compatible = "cfi-flash"; reg = <0x00000000 0x04000000>; bank-width = <2>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "uboot"; reg = <0x00000000 0x00040000>; }; partition@40000 { label = "uboot-env"; reg = <0x00040000 0x00020000>; }; partition@60000 { label = "flash"; reg = <0x00060000 0x03fa0000>; }; }; }; flash@4000000 { compatible = "cfi-flash"; reg = <0x04000000 0x04000000>; bank-width = <2>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "uboot1"; reg = <0x00000000 0x00040000>; }; partition@40000 { label = "uboot-env1"; reg = <0x00040000 0x00020000>; }; partition@60000 { label = "flash1"; reg = <0x00060000 0x03fa0000>; }; }; }; }; ðer { pinctrl-names = "default"; pinctrl-0 = <ðer_pins>; status = "okay"; renesas,no-ether-link; phy-handle = <&phy0>; phy0: ethernet-phy@0 { compatible = "ethernet-phy-idb824.2814", "ethernet-phy-ieee802.3-c22"; reg = <0>; }; }; &extal_clk { clock-frequency = <13330000>; }; &i2c2 { status = "okay"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins>; eeprom@50 { compatible = "renesas,r1ex24128", "atmel,24c128"; reg = <0x50>; pagesize = <64>; }; }; &mmcif { pinctrl-0 = <&mmcif_pins>; pinctrl-names = "default"; cd-gpios = <&port3 8 GPIO_ACTIVE_LOW>; vmmc-supply = <&cvcc2>; vqmmc-supply = <&cvcc2>; bus-width = <8>; status = "okay"; }; &mtu2 { status = "okay"; }; &ostm0 { status = "okay"; }; &ostm1 { status = "okay"; }; &pinctrl { ether_pins: ether { /* Ethernet on Ports 1,2,3,5 */ pinmux = ,/* P1_14 = ET_COL */ , /* P5_9 = ET_MDC */ , /* P3_3 = ET_MDIO */ , /* P3_4 = ET_RXCLK */ , /* P3_5 = ET_RXER */ , /* P3_6 = ET_RXDV */ , /* P2_0 = ET_TXCLK */ , /* P2_1 = ET_TXER */ , /* P2_2 = ET_TXEN */ , /* P2_3 = ET_CRS */ , /* P2_4 = ET_TXD0 */ , /* P2_5 = ET_TXD1 */ , /* P2_6 = ET_TXD2 */ , /* P2_7 = ET_TXD3 */ , /* P2_8 = ET_RXD0 */ , /* P2_9 = ET_RXD1 */ ,/* P2_10 = ET_RXD2 */ ;/* P2_11 = ET_RXD3 */ }; i2c2_pins: i2c2 { /* RIIC2: P1_4 as SCL, P1_5 as SDA */ pinmux = , ; }; keyboard_pins: keyboard { /* P3_1 as IRQ6 */ pinmux = ; }; mmcif_pins: mmcif { /* MMCIF: P3_8 is CD_GPIO, P3_10 up to P3_15, P4_0 up to P4_3 */ pinmux = , /* MMC_D1 */ , /* MMC_D0 */ , /* MMC_CLK */ , /* MMC_CMD */ , /* MMC_D3 */ , /* MMC_D2 */ , /* MMC_D4 */ , /* MMC_D5 */ , /* MMC_D6 */ ; /* MMC_D7 */ }; scif2_pins: serial2 { /* P3_0 as TxD2; P3_2 as RxD2 */ pinmux = , ; }; sdhi0_pins: sdhi0 { /* SDHI0: P4_8 up to P4_15 */ pinmux = , /* SD_CD_0 */ , /* SD_WP_0 */ , /* SD_D1_0 */ , /* SD_D0_0 */ , /* SD_CLK_0 */ , /* SD_CMD_0 */ , /* SD_D3_0 */ ; /* SD_D2_0 */ }; }; &rtc_x1_clk { clock-frequency = <32768>; }; &rtc { status = "okay"; }; &scif2 { pinctrl-names = "default"; pinctrl-0 = <&scif2_pins>; status = "okay"; }; &sdhi0 { pinctrl-names = "default"; pinctrl-0 = <&sdhi0_pins>; bus-width = <4>; status = "okay"; }; &spi4 { status = "okay"; codec: codec@0 { compatible = "wlf,wm8978"; reg = <0>; spi-max-frequency = <500000>; #sound-dai-cells = <0>; }; }; &usb_x1_clk { clock-frequency = <48000000>; }; &wdt { timeout-sec = <60>; status = "okay"; };