1 .cpu arm7tdmi 2 .arch armv4t 3 .fpu softvfp 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 4 11 .eabi_attribute 34, 0 12 .eabi_attribute 18, 4 13 .file "readcal.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .file 1 "board/pirelli_dpl10/readcal.c" 18 .section .text.afcdac_postproc,"ax",%progbits 19 .align 2 20 .syntax unified 21 .arm 23 afcdac_postproc: 24 .LFB0: 1:board/pirelli_dpl10/readcal.c **** /* 2:board/pirelli_dpl10/readcal.c **** * This code was written by Mychaela Falconia 3:board/pirelli_dpl10/readcal.c **** * who refuses to claim copyright on it and has released it as public domain 4:board/pirelli_dpl10/readcal.c **** * instead. NO rights reserved, all rights relinquished. 5:board/pirelli_dpl10/readcal.c **** * 6:board/pirelli_dpl10/readcal.c **** * Tweaked (coding style changes) by Vadim Yanitskiy 7:board/pirelli_dpl10/readcal.c **** * 8:board/pirelli_dpl10/readcal.c **** * This program is free software; you can redistribute it and/or modify 9:board/pirelli_dpl10/readcal.c **** * it under the terms of the GNU General Public License as published by 10:board/pirelli_dpl10/readcal.c **** * the Free Software Foundation; either version 2 of the License, or 11:board/pirelli_dpl10/readcal.c **** * (at your option) any later version. 12:board/pirelli_dpl10/readcal.c **** * 13:board/pirelli_dpl10/readcal.c **** * This program is distributed in the hope that it will be useful, 14:board/pirelli_dpl10/readcal.c **** * but WITHOUT ANY WARRANTY; without even the implied warranty of 15:board/pirelli_dpl10/readcal.c **** * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16:board/pirelli_dpl10/readcal.c **** * GNU General Public License for more details. 17:board/pirelli_dpl10/readcal.c **** * 18:board/pirelli_dpl10/readcal.c **** */ 19:board/pirelli_dpl10/readcal.c **** 20:board/pirelli_dpl10/readcal.c **** #include 21:board/pirelli_dpl10/readcal.c **** #include 22:board/pirelli_dpl10/readcal.c **** #include 23:board/pirelli_dpl10/readcal.c **** 24:board/pirelli_dpl10/readcal.c **** #include 25:board/pirelli_dpl10/readcal.c **** #include 26:board/pirelli_dpl10/readcal.c **** #include 27:board/pirelli_dpl10/readcal.c **** 28:board/pirelli_dpl10/readcal.c **** static int16_t afcdac_shifted; 29:board/pirelli_dpl10/readcal.c **** 30:board/pirelli_dpl10/readcal.c **** static void afcdac_postproc(void) 31:board/pirelli_dpl10/readcal.c **** { 25 .loc 1 31 1 view -0 26 .cfi_startproc 27 @ Function supports interworking. 28 @ args = 0, pretend = 0, frame = 0 29 @ frame_needed = 0, uses_anonymous_args = 0 30 @ link register save eliminated. 32:board/pirelli_dpl10/readcal.c **** afc_initial_dac_value = afcdac_shifted >> 3; 31 .loc 1 32 2 view .LVU1 32 .loc 1 32 24 is_stmt 0 view .LVU2 33 0000 10309FE5 ldr r3, .L2 34 0004 F030D3E1 ldrsh r3, [r3] 35 0008 0C209FE5 ldr r2, .L2+4 36 000c C331A0E1 asr r3, r3, #3 37 0010 B030C2E1 strh r3, [r2] @ movhi 33:board/pirelli_dpl10/readcal.c **** } 38 .loc 1 33 1 view .LVU3 39 0014 1EFF2FE1 bx lr 40 .L3: 41 .align 2 42 .L2: 43 0018 00000000 .word .LANCHOR0 44 001c 00000000 .word afc_initial_dac_value 45 .cfi_endproc 46 .LFE0: 48 .section .rodata.str1.1,"aMS",%progbits,1 49 .LC0: 50 0000 43686563 .ascii "Checking factory data block for the RF calibration " 50 6B696E67 50 20666163 50 746F7279 50 20646174 51 0033 7265636F .ascii "records\012\000" 51 7264730A 51 00 52 .LC1: 53 003c 466F756E .ascii "Found '%s' record, applying\012\000" 53 64202725 53 73272072 53 65636F72 53 642C2061 54 .section .text.read_factory_rf_calibration,"ax",%progbits 55 .align 2 56 .global read_factory_rf_calibration 57 .syntax unified 58 .arm 60 read_factory_rf_calibration: 61 .LFB2: 34:board/pirelli_dpl10/readcal.c **** 35:board/pirelli_dpl10/readcal.c **** static int verify_checksum(const uint8_t *start, size_t len) 36:board/pirelli_dpl10/readcal.c **** { 37:board/pirelli_dpl10/readcal.c **** const uint8_t *p, *endp; 38:board/pirelli_dpl10/readcal.c **** uint8_t accum; 39:board/pirelli_dpl10/readcal.c **** 40:board/pirelli_dpl10/readcal.c **** p = start; 41:board/pirelli_dpl10/readcal.c **** endp = start + len; 42:board/pirelli_dpl10/readcal.c **** accum = 0; 43:board/pirelli_dpl10/readcal.c **** while (p < endp) 44:board/pirelli_dpl10/readcal.c **** accum += *p++; 45:board/pirelli_dpl10/readcal.c **** 46:board/pirelli_dpl10/readcal.c **** if (accum == *p) 47:board/pirelli_dpl10/readcal.c **** return 0; /* good */ 48:board/pirelli_dpl10/readcal.c **** else 49:board/pirelli_dpl10/readcal.c **** return -1; /* bad */ 50:board/pirelli_dpl10/readcal.c **** } 51:board/pirelli_dpl10/readcal.c **** 52:board/pirelli_dpl10/readcal.c **** static const struct calmap { 53:board/pirelli_dpl10/readcal.c **** char *desc; 54:board/pirelli_dpl10/readcal.c **** unsigned offset; 55:board/pirelli_dpl10/readcal.c **** size_t record_len; 56:board/pirelli_dpl10/readcal.c **** void *buffer; 57:board/pirelli_dpl10/readcal.c **** void (*postproc)(void); 58:board/pirelli_dpl10/readcal.c **** } rf_cal_list[] = { 59:board/pirelli_dpl10/readcal.c **** { "afcdac", 0x528, 2, &afcdac_shifted, afcdac_postproc }, 60:board/pirelli_dpl10/readcal.c **** { "Tx ramps 900", 0x72B, 512, rf_tx_ramps_900, NULL }, 61:board/pirelli_dpl10/readcal.c **** { "Tx levels 900", 0x92C, 128, rf_tx_levels_900, NULL }, 62:board/pirelli_dpl10/readcal.c **** { "Tx calchan 900", 0x9AD, 128, rf_tx_chan_cal_900, NULL }, 63:board/pirelli_dpl10/readcal.c **** { "Tx ramps 1800", 0xA2E, 512, rf_tx_ramps_1800, NULL }, 64:board/pirelli_dpl10/readcal.c **** { "Tx levels 1800", 0xC2F, 128, rf_tx_levels_1800, NULL }, 65:board/pirelli_dpl10/readcal.c **** { "Tx calchan 1800", 0xCB0, 128, rf_tx_chan_cal_1800, NULL }, 66:board/pirelli_dpl10/readcal.c **** { "Tx ramps 1900", 0xD31, 512, rf_tx_ramps_1900, NULL }, 67:board/pirelli_dpl10/readcal.c **** { "Tx levels 1900", 0xF32, 128, rf_tx_levels_1900, NULL }, 68:board/pirelli_dpl10/readcal.c **** { "Tx calchan 1900", 0xFB3, 128, rf_tx_chan_cal_1900, NULL }, 69:board/pirelli_dpl10/readcal.c **** { NULL, 0, 0, NULL, NULL } 70:board/pirelli_dpl10/readcal.c **** }; 71:board/pirelli_dpl10/readcal.c **** 72:board/pirelli_dpl10/readcal.c **** void read_factory_rf_calibration(void) 73:board/pirelli_dpl10/readcal.c **** { 62 .loc 1 73 1 is_stmt 1 view -0 63 .cfi_startproc 64 @ Function supports interworking. 65 @ args = 0, pretend = 0, frame = 0 66 @ frame_needed = 0, uses_anonymous_args = 0 74:board/pirelli_dpl10/readcal.c **** const struct calmap *tp; 67 .loc 1 74 2 view .LVU5 75:board/pirelli_dpl10/readcal.c **** const uint8_t *record; 68 .loc 1 75 2 view .LVU6 76:board/pirelli_dpl10/readcal.c **** 77:board/pirelli_dpl10/readcal.c **** puts("Checking factory data block for the RF calibration records\n"); 69 .loc 1 77 2 view .LVU7 73:board/pirelli_dpl10/readcal.c **** const struct calmap *tp; 70 .loc 1 73 1 is_stmt 0 view .LVU8 71 0000 70402DE9 push {r4, r5, r6, lr} 72 .LCFI0: 73 .cfi_def_cfa_offset 16 74 .cfi_offset 4, -16 75 .cfi_offset 5, -12 76 .cfi_offset 6, -8 77 .cfi_offset 14, -4 78 .loc 1 77 2 view .LVU9 79 0004 88009FE5 ldr r0, .L16 80 0008 FEFFFFEB bl puts 81 .LVL0: 78:board/pirelli_dpl10/readcal.c **** for (tp = rf_cal_list; tp->desc; tp++) { 82 .loc 1 78 2 is_stmt 1 view .LVU10 83 .loc 1 78 10 is_stmt 0 view .LVU11 84 000c 84409FE5 ldr r4, .L16+4 79:board/pirelli_dpl10/readcal.c **** record = (const uint8_t *)0x027F0000 + tp->offset; 80:board/pirelli_dpl10/readcal.c **** if (verify_checksum(record, tp->record_len) < 0) 81:board/pirelli_dpl10/readcal.c **** continue; 82:board/pirelli_dpl10/readcal.c **** printf("Found '%s' record, applying\n", tp->desc); 85 .loc 1 82 3 view .LVU12 86 0010 84609FE5 ldr r6, .L16+8 87 .LVL1: 88 .L5: 78:board/pirelli_dpl10/readcal.c **** for (tp = rf_cal_list; tp->desc; tp++) { 89 .loc 1 78 25 is_stmt 1 discriminator 1 view .LVU13 78:board/pirelli_dpl10/readcal.c **** for (tp = rf_cal_list; tp->desc; tp++) { 90 .loc 1 78 27 is_stmt 0 discriminator 1 view .LVU14 91 0014 001094E5 ldr r1, [r4] 78:board/pirelli_dpl10/readcal.c **** for (tp = rf_cal_list; tp->desc; tp++) { 92 .loc 1 78 25 discriminator 1 view .LVU15 93 0018 000051E3 cmp r1, #0 94 001c 0100001A bne .L11 83:board/pirelli_dpl10/readcal.c **** memcpy(tp->buffer, record, tp->record_len); 84:board/pirelli_dpl10/readcal.c **** if (tp->postproc) 85:board/pirelli_dpl10/readcal.c **** tp->postproc(); 86:board/pirelli_dpl10/readcal.c **** } 87:board/pirelli_dpl10/readcal.c **** } 95 .loc 1 87 1 view .LVU16 96 0020 7040BDE8 pop {r4, r5, r6, lr} 97 .LCFI1: 98 .cfi_remember_state 99 .cfi_restore 14 100 .cfi_restore 6 101 .cfi_restore 5 102 .cfi_restore 4 103 .cfi_def_cfa_offset 0 104 .LVL2: 105 .loc 1 87 1 view .LVU17 106 0024 1EFF2FE1 bx lr 107 .LVL3: 108 .L11: 109 .LCFI2: 110 .cfi_restore_state 79:board/pirelli_dpl10/readcal.c **** record = (const uint8_t *)0x027F0000 + tp->offset; 111 .loc 1 79 3 is_stmt 1 view .LVU18 112 .LBB4: 113 .LBB5: 42:board/pirelli_dpl10/readcal.c **** while (p < endp) 114 .loc 1 42 8 is_stmt 0 view .LVU19 115 0028 0030A0E3 mov r3, #0 116 .LBE5: 117 .LBE4: 79:board/pirelli_dpl10/readcal.c **** record = (const uint8_t *)0x027F0000 + tp->offset; 118 .loc 1 79 10 view .LVU20 119 002c 045094E5 ldr r5, [r4, #4] 120 .LBB9: 121 .LBB6: 41:board/pirelli_dpl10/readcal.c **** accum = 0; 122 .loc 1 41 7 view .LVU21 123 0030 080094E5 ldr r0, [r4, #8] 124 .LBE6: 125 .LBE9: 79:board/pirelli_dpl10/readcal.c **** if (verify_checksum(record, tp->record_len) < 0) 126 .loc 1 79 10 view .LVU22 127 0034 9F5785E2 add r5, r5, #41680896 128 0038 035885E2 add r5, r5, #196608 129 .LVL4: 80:board/pirelli_dpl10/readcal.c **** continue; 130 .loc 1 80 3 is_stmt 1 view .LVU23 131 .LBB10: 132 .LBI4: 35:board/pirelli_dpl10/readcal.c **** { 133 .loc 1 35 12 view .LVU24 134 .LBB7: 37:board/pirelli_dpl10/readcal.c **** uint8_t accum; 135 .loc 1 37 2 view .LVU25 38:board/pirelli_dpl10/readcal.c **** 136 .loc 1 38 2 view .LVU26 40:board/pirelli_dpl10/readcal.c **** endp = start + len; 137 .loc 1 40 2 view .LVU27 41:board/pirelli_dpl10/readcal.c **** accum = 0; 138 .loc 1 41 2 view .LVU28 41:board/pirelli_dpl10/readcal.c **** accum = 0; 139 .loc 1 41 7 is_stmt 0 view .LVU29 140 003c 000085E0 add r0, r5, r0 141 .LVL5: 42:board/pirelli_dpl10/readcal.c **** while (p < endp) 142 .loc 1 42 2 is_stmt 1 view .LVU30 43:board/pirelli_dpl10/readcal.c **** accum += *p++; 143 .loc 1 43 2 view .LVU31 144 0040 012045E2 sub r2, r5, #1 145 .LVL6: 146 .L6: 43:board/pirelli_dpl10/readcal.c **** accum += *p++; 147 .loc 1 43 11 view .LVU32 44:board/pirelli_dpl10/readcal.c **** 148 .loc 1 44 12 is_stmt 0 view .LVU33 149 0044 01C0F2E5 ldrb ip, [r2, #1]! @ zero_extendqisi2 150 .LVL7: 43:board/pirelli_dpl10/readcal.c **** accum += *p++; 151 .loc 1 43 11 view .LVU34 152 0048 020050E1 cmp r0, r2 153 004c 0D00008A bhi .L7 46:board/pirelli_dpl10/readcal.c **** return 0; /* good */ 154 .loc 1 46 2 is_stmt 1 view .LVU35 46:board/pirelli_dpl10/readcal.c **** return 0; /* good */ 155 .loc 1 46 5 is_stmt 0 view .LVU36 156 0050 0C0053E1 cmp r3, ip 157 0054 0900001A bne .L9 158 .LVL8: 46:board/pirelli_dpl10/readcal.c **** return 0; /* good */ 159 .loc 1 46 5 view .LVU37 160 .LBE7: 161 .LBE10: 82:board/pirelli_dpl10/readcal.c **** memcpy(tp->buffer, record, tp->record_len); 162 .loc 1 82 3 is_stmt 1 view .LVU38 163 0058 0600A0E1 mov r0, r6 164 005c FEFFFFEB bl printf 165 .LVL9: 83:board/pirelli_dpl10/readcal.c **** if (tp->postproc) 166 .loc 1 83 3 view .LVU39 167 0060 0510A0E1 mov r1, r5 168 0064 082094E5 ldr r2, [r4, #8] 169 0068 0C0094E5 ldr r0, [r4, #12] 170 006c FEFFFFEB bl memcpy 171 .LVL10: 84:board/pirelli_dpl10/readcal.c **** tp->postproc(); 172 .loc 1 84 3 view .LVU40 84:board/pirelli_dpl10/readcal.c **** tp->postproc(); 173 .loc 1 84 9 is_stmt 0 view .LVU41 174 0070 103094E5 ldr r3, [r4, #16] 84:board/pirelli_dpl10/readcal.c **** tp->postproc(); 175 .loc 1 84 6 view .LVU42 176 0074 000053E3 cmp r3, #0 85:board/pirelli_dpl10/readcal.c **** } 177 .loc 1 85 4 is_stmt 1 view .LVU43 178 0078 0FE0A011 movne lr, pc 179 007c 13FF2F11 bxne r3 180 .LVL11: 181 .L9: 78:board/pirelli_dpl10/readcal.c **** record = (const uint8_t *)0x027F0000 + tp->offset; 182 .loc 1 78 37 discriminator 2 view .LVU44 183 0080 144084E2 add r4, r4, #20 184 .LVL12: 78:board/pirelli_dpl10/readcal.c **** record = (const uint8_t *)0x027F0000 + tp->offset; 185 .loc 1 78 37 is_stmt 0 discriminator 2 view .LVU45 186 0084 E2FFFFEA b .L5 187 .LVL13: 188 .L7: 189 .LBB11: 190 .LBB8: 44:board/pirelli_dpl10/readcal.c **** 191 .loc 1 44 3 is_stmt 1 view .LVU46 44:board/pirelli_dpl10/readcal.c **** 192 .loc 1 44 9 is_stmt 0 view .LVU47 193 0088 0C3083E0 add r3, r3, ip 194 .LVL14: 44:board/pirelli_dpl10/readcal.c **** 195 .loc 1 44 9 view .LVU48 196 008c FF3003E2 and r3, r3, #255 197 .LVL15: 44:board/pirelli_dpl10/readcal.c **** 198 .loc 1 44 9 view .LVU49 199 0090 EBFFFFEA b .L6 200 .L17: 201 .align 2 202 .L16: 203 0094 00000000 .word .LC0 204 0098 00000000 .word .LANCHOR1 205 009c 3C000000 .word .LC1 206 .LBE8: 207 .LBE11: 208 .cfi_endproc 209 .LFE2: 211 .section .rodata.str1.1 212 .LC2: 213 0059 61666364 .ascii "afcdac\000" 213 616300 214 .LC3: 215 0060 54782072 .ascii "Tx ramps 900\000" 215 616D7073 215 20393030 215 00 216 .LC4: 217 006d 5478206C .ascii "Tx levels 900\000" 217 6576656C 217 73203930 217 3000 218 .LC5: 219 007b 54782063 .ascii "Tx calchan 900\000" 219 616C6368 219 616E2039 219 303000 220 .LC6: 221 008a 54782072 .ascii "Tx ramps 1800\000" 221 616D7073 221 20313830 221 3000 222 .LC7: 223 0098 5478206C .ascii "Tx levels 1800\000" 223 6576656C 223 73203138 223 303000 224 .LC8: 225 00a7 54782063 .ascii "Tx calchan 1800\000" 225 616C6368 225 616E2031 225 38303000 226 .LC9: 227 00b7 54782072 .ascii "Tx ramps 1900\000" 227 616D7073 227 20313930 227 3000 228 .LC10: 229 00c5 5478206C .ascii "Tx levels 1900\000" 229 6576656C 229 73203139 229 303000 230 .LC11: 231 00d4 54782063 .ascii "Tx calchan 1900\000" 231 616C6368 231 616E2031 231 39303000 232 .section .rodata 233 .align 2 234 .set .LANCHOR1,. + 0 237 rf_cal_list: 238 0000 59000000 .word .LC2 239 0004 28050000 .word 1320 240 0008 02000000 .word 2 241 000c 00000000 .word afcdac_shifted 242 0010 00000000 .word afcdac_postproc 243 0014 60000000 .word .LC3 244 0018 2B070000 .word 1835 245 001c 00020000 .word 512 246 0020 00000000 .word rf_tx_ramps_900 247 0024 00000000 .word 0 248 0028 6D000000 .word .LC4 249 002c 2C090000 .word 2348 250 0030 80000000 .word 128 251 0034 00000000 .word rf_tx_levels_900 252 0038 00000000 .word 0 253 003c 7B000000 .word .LC5 254 0040 AD090000 .word 2477 255 0044 80000000 .word 128 256 0048 00000000 .word rf_tx_chan_cal_900 257 004c 00000000 .word 0 258 0050 8A000000 .word .LC6 259 0054 2E0A0000 .word 2606 260 0058 00020000 .word 512 261 005c 00000000 .word rf_tx_ramps_1800 262 0060 00000000 .word 0 263 0064 98000000 .word .LC7 264 0068 2F0C0000 .word 3119 265 006c 80000000 .word 128 266 0070 00000000 .word rf_tx_levels_1800 267 0074 00000000 .word 0 268 0078 A7000000 .word .LC8 269 007c B00C0000 .word 3248 270 0080 80000000 .word 128 271 0084 00000000 .word rf_tx_chan_cal_1800 272 0088 00000000 .word 0 273 008c B7000000 .word .LC9 274 0090 310D0000 .word 3377 275 0094 00020000 .word 512 276 0098 00000000 .word rf_tx_ramps_1900 277 009c 00000000 .word 0 278 00a0 C5000000 .word .LC10 279 00a4 320F0000 .word 3890 280 00a8 80000000 .word 128 281 00ac 00000000 .word rf_tx_levels_1900 282 00b0 00000000 .word 0 283 00b4 D4000000 .word .LC11 284 00b8 B30F0000 .word 4019 285 00bc 80000000 .word 128 286 00c0 00000000 .word rf_tx_chan_cal_1900 287 00c4 00000000 .word 0 288 00c8 00000000 .word 0 289 00cc 00000000 .word 0 290 00d0 00000000 .word 0 291 00d4 00000000 .word 0 292 00d8 00000000 .word 0 293 .bss 294 .align 1 295 .set .LANCHOR0,. + 0 298 afcdac_shifted: 299 0000 0000 .space 2 300 .text 301 .Letext0: 302 .file 2 "/usr/include/newlib/machine/_default_types.h" 303 .file 3 "/usr/lib/gcc/arm-none-eabi/12.2.1/include/stddef.h" 304 .file 4 "/usr/include/newlib/sys/_stdint.h" 305 .file 5 "include/rf/txcal.h" 306 .file 6 "include/rf/vcxocal.h" 307 .file 7 "include/string.h" 308 .file 8 "include/stdio.h" 309 .file 9 "" DEFINED SYMBOLS *ABS*:00000000 readcal.c /tmp/ccVmGECW.s:19 .text.afcdac_postproc:00000000 $a /tmp/ccVmGECW.s:23 .text.afcdac_postproc:00000000 afcdac_postproc /tmp/ccVmGECW.s:43 .text.afcdac_postproc:00000018 $d /tmp/ccVmGECW.s:55 .text.read_factory_rf_calibration:00000000 $a /tmp/ccVmGECW.s:60 .text.read_factory_rf_calibration:00000000 read_factory_rf_calibration /tmp/ccVmGECW.s:203 .text.read_factory_rf_calibration:00000094 $d /tmp/ccVmGECW.s:233 .rodata:00000000 $d /tmp/ccVmGECW.s:237 .rodata:00000000 rf_cal_list /tmp/ccVmGECW.s:298 .bss:00000000 afcdac_shifted /tmp/ccVmGECW.s:294 .bss:00000000 $d UNDEFINED SYMBOLS afc_initial_dac_value puts printf memcpy rf_tx_ramps_900 rf_tx_levels_900 rf_tx_chan_cal_900 rf_tx_ramps_1800 rf_tx_levels_1800 rf_tx_chan_cal_1800 rf_tx_ramps_1900 rf_tx_levels_1900 rf_tx_chan_cal_1900