ttcn3_bts_tests 92

Took 49 min

All Tests

Name	Age	Duration
TC_chan_act_a51	2	39 sec
TC_chan_act_a52	2	39 sec
TC_chan_act_a53	25	39 sec
TC_chan_act_react	0	27 sec
TC_chan_act_stress	2	35 sec
TC_chan_act_wrong_nr	0	19 sec
TC_chan_deact_not_active	0	17 sec
TC_chopped_ipa_payload	1	1 min 0 sec
TC_chopped_ipa_ping	0	48 sec
TC_conn_fail_crit	3	40 sec
TC_deact_sacch	25	32 sec
TC_dyn_ipa_pdch_tchf_act	0	17 sec
TC_dyn_ipa_pdch_tchf_act_pdch_act_nack	0	18 sec
TC_dyn_osmo_pdch_tchf_act	0	17 sec
TC_dyn_osmo_pdch_tchh_act	0	17 sec
TC_dyn_osmo_pdch_unsol_deact	0	17 sec
TC_encr_cmd_a51	2	40 sec
TC_encr_cmd_a52	3	39 sec
TC_encr_cmd_a53	25	40 sec
TC_err_rep_wrong_mdisc	0	29 sec
TC_err_rep_wrong_msg_type	0	17 sec
TC_err_rep_wrong_sequence	0	17 sec
TC_ho_rach	25	40 sec
TC_ipa_crcx_mdcx_dlcx_not_active	0	17 sec
TC_ipa_crcx_mdcx_mdcx_dlcx_not_active	0	17 sec
TC_ipa_crcx_sdcch_not_active	0	17 sec
TC_ipa_crcx_twice_not_active	0	17 sec
TC_ipa_dlcx_not_active	0	29 sec
TC_lapdm_selftest	0	23 ms
TC_meas_res_sign_sdcch4	25	39 sec
TC_meas_res_sign_sdcch8	25	39 sec
TC_meas_res_sign_tchf	25	28 sec
TC_meas_res_sign_tchh	25	39 sec
TC_meas_res_sign_tchh_toa256	25	39 sec
TC_paging_imsi_200percent	2	40 sec
TC_paging_imsi_80percent	2	39 sec
TC_paging_tmsi_200percent	2	39 sec
TC_paging_tmsi_80percent	2	39 sec
TC_rach_content	2	40 sec
TC_rach_content_emerg	2	39 sec
TC_rach_count	2	40 sec
TC_rach_load_count	25	2 sec
TC_rach_load_idle_below_thresh	25	2 sec
TC_rach_load_idle_thresh0	25	2 sec
TC_rach_max_ta	25	39 sec
TC_rll_est_ind	2	31 sec
TC_rll_est_req_ACCH_3	25	40 sec
TC_rll_est_req_DCCH_3	2	39 sec
TC_rll_rel_ind_ACCH_0	25	40 sec
TC_rll_rel_ind_ACCH_3	25	39 sec
TC_rll_rel_ind_DCCH_0	2	40 sec
TC_rll_rel_ind_DCCH_3	2	39 sec
TC_rll_rel_req	25	39 sec
TC_rll_unit_data_ind_ACCH	3	40 sec
TC_rll_unit_data_ind_DCCH	2	39 sec
TC_rll_unit_data_req_ACCH	25	39 sec
TC_rll_unit_data_req_DCCH	2	40 sec
TC_rsl_bs_pwr_static_ass	2	31 sec
TC_rsl_bs_pwr_static_power_control	2	39 sec
TC_rsl_chan_initial_ms_pwr	25	29 sec
TC_rsl_chan_initial_ta	25	40 sec
TC_rsl_ie_content_error	0	17 sec
TC_rsl_mand_ie_error	0	17 sec
TC_rsl_modify_encr	25	39 sec
TC_rsl_ms_pwr_ctrl	2	39 sec
TC_rsl_ms_pwr_dyn_active	25	29 sec
TC_rsl_ms_pwr_dyn_active2	25	17 sec
TC_rsl_ms_pwr_dyn_ass_updown	25	17 sec
TC_rsl_ms_pwr_dyn_down	25	17 sec
TC_rsl_ms_pwr_dyn_max	25	17 sec
TC_rsl_ms_pwr_dyn_up	25	17 sec
TC_rsl_protocol_error	0	29 sec
TC_sacch_chan_act	25	40 sec
TC_sacch_chan_act_ho_async	25	39 sec
TC_sacch_chan_act_ho_sync	25	39 sec
TC_sacch_filling	25	39 sec
TC_sacch_info_mod	25	40 sec
TC_sacch_multi	25	40 sec
TC_sacch_multi_chg	25	39 sec
TC_si_sched_1	2	39 sec
TC_si_sched_13	2	40 sec
TC_si_sched_13_2bis_2ter_2quater	25	39 sec
TC_si_sched_2bis	2	39 sec
TC_si_sched_2quater	25	39 sec
TC_si_sched_2ter	2	40 sec
TC_si_sched_2ter_2bis	2	40 sec
TC_si_sched_default	2	29 sec
TC_tch_sign_l2_fill_frame	25	27 sec
TC_tch_sign_l2_fill_frame_dtxd	25	39 sec
TC_tx_power_ramp_adm_state_change	25	21 sec
TC_tx_power_start_ramp_down_bcch	25	30 sec
TC_tx_power_start_ramp_up_bcch	25	40 sec