TC_chan_act_a51 | 36 sec | Regression |
TC_chan_act_a52 | 36 sec | Failed |
TC_chan_act_a53 | 37 sec | Failed |
TC_chan_act_react | 21 sec | Passed |
TC_chan_act_stress | 31 sec | Failed |
TC_chan_act_wrong_nr | 14 sec | Passed |
TC_chan_deact_not_active | 12 sec | Passed |
TC_chopped_ipa_payload | 1 min 0 sec | Failed |
TC_chopped_ipa_ping | 42 sec | Passed |
TC_conn_fail_crit | 36 sec | Regression |
TC_deact_sacch | 51 sec | Failed |
TC_dyn_ipa_pdch_tchf_act | 12 sec | Passed |
TC_dyn_ipa_pdch_tchf_act_pdch_act_nack | 13 sec | Passed |
TC_dyn_osmo_pdch_tchf_act | 12 sec | Passed |
TC_dyn_osmo_pdch_tchh_act | 12 sec | Passed |
TC_dyn_osmo_pdch_unsol_deact | 12 sec | Passed |
TC_encr_cmd_a51 | 27 sec | Passed |
TC_encr_cmd_a52 | 22 sec | Failed |
TC_encr_cmd_a53 | 28 sec | Failed |
TC_err_rep_wrong_mdisc | 22 sec | Passed |
TC_err_rep_wrong_msg_type | 13 sec | Passed |
TC_err_rep_wrong_sequence | 13 sec | Passed |
TC_ho_rach | 29 sec | Failed |
TC_ipa_crcx_mdcx_dlcx_not_active | 12 sec | Passed |
TC_ipa_crcx_mdcx_mdcx_dlcx_not_active | 12 sec | Passed |
TC_ipa_crcx_sdcch_not_active | 12 sec | Passed |
TC_ipa_crcx_twice_not_active | 12 sec | Passed |
TC_ipa_dlcx_not_active | 22 sec | Passed |
TC_lapdm_selftest | 24 ms | Passed |
TC_meas_res_sign_sdcch4 | 37 sec | Failed |
TC_meas_res_sign_sdcch8 | 37 sec | Failed |
TC_meas_res_sign_tchf | 24 sec | Failed |
TC_meas_res_sign_tchh | 36 sec | Failed |
TC_meas_res_sign_tchh_toa256 | 37 sec | Failed |
TC_ms_pwr_ctrl_constant | 23 sec | Failed |
TC_paging_imsi_200percent | 37 sec | Regression |
TC_paging_imsi_80percent | 36 sec | Regression |
TC_paging_tmsi_200percent | 37 sec | Failed |
TC_paging_tmsi_80percent | 36 sec | Failed |
TC_rach_content | 1 min 7 sec | Passed |
TC_rach_content_emerg | 1 min 18 sec | Passed |
TC_rach_count | 1 min 23 sec | Passed |
TC_rach_load_count | 2 sec | Failed |
TC_rach_load_idle_below_thresh | 2 sec | Failed |
TC_rach_load_idle_thresh0 | 2 sec | Failed |
TC_rach_max_ta | 23 sec | Failed |
TC_rll_est_ind | 29 sec | Regression |
TC_rll_est_req_ACCH_3 | 37 sec | Failed |
TC_rll_est_req_DCCH_3 | 36 sec | Regression |
TC_rll_rel_ind_ACCH_0 | 36 sec | Failed |
TC_rll_rel_ind_ACCH_3 | 36 sec | Failed |
TC_rll_rel_ind_DCCH_0 | 37 sec | Regression |
TC_rll_rel_ind_DCCH_3 | 37 sec | Regression |
TC_rll_rel_req | 37 sec | Failed |
TC_rll_unit_data_ind_ACCH | 42 sec | Regression |
TC_rll_unit_data_ind_DCCH | 37 sec | Regression |
TC_rll_unit_data_req_ACCH | 37 sec | Failed |
TC_rll_unit_data_req_DCCH | 37 sec | Regression |
TC_rsl_bs_pwr_static_ass | 29 sec | Regression |
TC_rsl_bs_pwr_static_power_control | 36 sec | Regression |
TC_rsl_chan_initial_ms_pwr | 28 sec | Failed |
TC_rsl_chan_initial_ta | 36 sec | Failed |
TC_rsl_ie_content_error | 12 sec | Passed |
TC_rsl_mand_ie_error | 12 sec | Passed |
TC_rsl_modify_encr | 42 sec | Failed |
TC_rsl_ms_pwr_ctrl | 37 sec | Failed |
TC_rsl_ms_pwr_dyn_active | 22 sec | Failed |
TC_rsl_ms_pwr_dyn_active2 | 12 sec | Failed |
TC_rsl_ms_pwr_dyn_ass_updown | 12 sec | Failed |
TC_rsl_ms_pwr_dyn_down | 12 sec | Failed |
TC_rsl_ms_pwr_dyn_max | 12 sec | Failed |
TC_rsl_ms_pwr_dyn_up | 12 sec | Failed |
TC_rsl_protocol_error | 22 sec | Passed |
TC_sacch_chan_act | 37 sec | Failed |
TC_sacch_chan_act_ho_async | 21 sec | Failed |
TC_sacch_chan_act_ho_sync | 13 sec | Failed |
TC_sacch_filling | 40 sec | Failed |
TC_sacch_info_mod | 40 sec | Failed |
TC_sacch_multi | 58 sec | Failed |
TC_sacch_multi_chg | 59 sec | Failed |
TC_si_sched_1 | 36 sec | Regression |
TC_si_sched_13 | 37 sec | Failed |
TC_si_sched_13_2bis_2ter_2quater | 47 sec | Failed |
TC_si_sched_2bis | 37 sec | Failed |
TC_si_sched_2quater | 37 sec | Failed |
TC_si_sched_2ter | 37 sec | Regression |
TC_si_sched_2ter_2bis | 37 sec | Regression |
TC_si_sched_default | 27 sec | Regression |
TC_tch_sign_l2_fill_frame | 19 sec | Failed |
TC_tch_sign_l2_fill_frame_dtxd | 32 sec | Failed |
TC_tx_power_ramp_adm_state_change | 16 sec | Failed |
TC_tx_power_start_ramp_down_bcch | 24 sec | Failed |
TC_tx_power_start_ramp_up_bcch | 37 sec | Failed |