ttcn3_bts_tests 136

Took 46 min

All Tests

Name	Age	Duration
TC_chan_act_a51 Regression	1	26 sec
TC_chan_act_a52 Regression	1	25 sec
TC_chan_act_a53	30	15 sec
TC_chan_act_react	0	10 sec
TC_chan_act_stress	0	19 sec
TC_chan_act_wrong_nr	0	12 sec
TC_chan_deact_not_active	0	11 sec
TC_chopped_ipa_payload	0	43 sec
TC_chopped_ipa_ping	0	31 sec
TC_conn_fail_crit	2	25 sec
TC_deact_sacch	30	46 sec
TC_dyn_ipa_pdch_act_deact	0	13 sec
TC_dyn_ipa_pdch_act_tchf_act_nack	0	10 sec
TC_dyn_ipa_pdch_tchf_act	0	10 sec
TC_dyn_ipa_pdch_tchf_act_pdch_act_nack	0	10 sec
TC_dyn_osmo_pdch_act_deact	0	14 sec
TC_dyn_osmo_pdch_double_act	0	10 sec
TC_dyn_osmo_pdch_tchf_act	0	5.5 sec
TC_dyn_osmo_pdch_tchh_act	0	11 sec
TC_dyn_osmo_pdch_unsol_deact	0	6.6 sec
TC_encr_cmd_a51	0	16 sec
TC_encr_cmd_a52 Fixed	0	15 sec
TC_encr_cmd_a53	30	14 sec
TC_err_rep_wrong_mdisc	0	10 sec
TC_err_rep_wrong_msg_type	0	10 sec
TC_err_rep_wrong_sequence	0	10 sec
TC_ho_rach	30	26 sec
TC_ipa_crcx_mdcx_dlcx_not_active	0	10 sec
TC_ipa_crcx_mdcx_mdcx_dlcx_not_active	0	10 sec
TC_ipa_crcx_sdcch_not_active	0	10 sec
TC_ipa_crcx_twice_not_active	0	10 sec
TC_ipa_dlcx_not_active	0	10 sec
TC_lapdm_selftest	0	25 ms
TC_meas_res_sign_sdcch4	30	25 sec
TC_meas_res_sign_sdcch8	30	25 sec
TC_meas_res_sign_tchf	30	26 sec
TC_meas_res_sign_tchh	30	25 sec
TC_meas_res_sign_tchh_toa256	30	25 sec
TC_meas_res_speech_tchf	4	22 sec
TC_meas_res_speech_tchf_facch	1	26 sec
TC_meas_res_speech_tchh	4	25 sec
TC_meas_res_speech_tchh_facch	1	25 sec
TC_meas_res_speech_tchh_toa256	3	25 sec
TC_ms_pwr_ctrl_constant	5	16 sec
TC_ms_pwr_ctrl_pf_ewma	4	17 sec
TC_paging_imsi_200percent Regression	1	25 sec
TC_paging_imsi_80percent Regression	1	25 sec
TC_paging_tmsi_200percent Regression	1	25 sec
TC_paging_tmsi_80percent Regression	1	26 sec
TC_pcu_act_req	0	13 sec
TC_pcu_act_req_wrong_bts	0	16 sec
TC_pcu_act_req_wrong_trx	0	16 sec
TC_pcu_act_req_wrong_ts	0	16 sec
TC_pcu_data_ind_lqual_cb	12	25 sec
TC_pcu_data_req_agch Regression	1	25 sec
TC_pcu_data_req_imm_ass_pch Regression	1	25 sec
TC_pcu_data_req_pch Regression	1	25 sec
TC_pcu_deact_req	0	18 sec
TC_pcu_deact_req_wrong_ts	0	14 sec
TC_pcu_ext_rach_content	12	25 sec
TC_pcu_info_ind_fh_params	0	10 sec
TC_pcu_oml_alert	12	13 sec
TC_pcu_paging_from_rsl	0	12 sec
TC_pcu_ptcch	12	25 sec
TC_pcu_rach_content Regression	1	25 sec
TC_pcu_rr_suspend Regression	1	25 sec
TC_pcu_rts_req	0	18 sec
TC_pcu_socket_connect_multi	0	15 sec
TC_pcu_socket_connect_si3gprs Regression	1	26 sec
TC_pcu_socket_connect_si4gprs Regression	1	25 sec
TC_pcu_socket_disconnect_nosi3gprs Regression	1	25 sec
TC_pcu_socket_disconnect_nosi4gprs Regression	1	25 sec
TC_pcu_socket_noconnect_nosi3gprs Regression	1	23 sec
TC_pcu_socket_noconnect_nosi4gprs Regression	1	23 sec
TC_pcu_socket_nsvc_ipv4	12	2 sec
TC_pcu_socket_nsvc_ipv6	12	2 sec
TC_pcu_socket_reconnect	0	12 sec
TC_pcu_socket_verify_info_ind	6	12 sec
TC_pcu_time_ind	0	18 sec
TC_pcu_ver_si13	0	10 sec
TC_rach_content	0	1 min 8 sec
TC_rach_content_emerg	0	1 min 10 sec
TC_rach_count	0	1 min 5 sec
TC_rach_load_count	30	2 sec
TC_rach_load_idle_below_thresh	30	2 sec
TC_rach_load_idle_thresh0	30	2 sec
TC_rach_max_ta	30	11 sec
TC_rll_est_ind	2	25 sec
TC_rll_est_req_ACCH_3	30	25 sec
TC_rll_est_req_DCCH_3 Regression	1	25 sec
TC_rll_rel_ind_ACCH_0	30	25 sec
TC_rll_rel_ind_ACCH_3	30	25 sec
TC_rll_rel_ind_DCCH_0 Regression	1	25 sec
TC_rll_rel_ind_DCCH_3 Regression	1	25 sec
TC_rll_rel_req	30	25 sec
TC_rll_unit_data_ind_ACCH Regression	1	25 sec
TC_rll_unit_data_ind_DCCH Regression	1	26 sec
TC_rll_unit_data_req_ACCH	30	25 sec
TC_rll_unit_data_req_DCCH Regression	1	25 sec
TC_rsl_bs_pwr_static_ass Regression	1	25 sec
TC_rsl_bs_pwr_static_power_control Regression	1	25 sec
TC_rsl_chan_initial_ms_pwr	30	25 sec
TC_rsl_chan_initial_ta	30	25 sec
TC_rsl_ie_content_error	0	10 sec
TC_rsl_mand_ie_error	0	10 sec
TC_rsl_modify_encr	30	26 sec
TC_rsl_ms_pwr_ctrl	2	25 sec
TC_rsl_ms_pwr_dyn_active	30	10 sec
TC_rsl_ms_pwr_dyn_active2	30	10 sec
TC_rsl_ms_pwr_dyn_ass_updown	30	10 sec
TC_rsl_ms_pwr_dyn_down	30	10 sec
TC_rsl_ms_pwr_dyn_max	30	10 sec
TC_rsl_ms_pwr_dyn_up	30	10 sec
TC_rsl_protocol_error	0	10 sec
TC_sacch_chan_act	30	26 sec
TC_sacch_chan_act_ho_async	30	11 sec
TC_sacch_chan_act_ho_sync	30	10 sec
TC_sacch_filling	30	21 sec
TC_sacch_info_mod	30	28 sec
TC_sacch_multi	30	44 sec
TC_sacch_multi_chg	30	47 sec
TC_si_sched_1 Regression	1	25 sec
TC_si_sched_13 Regression	1	25 sec
TC_si_sched_13_2bis_2ter_2quater	30	25 sec
TC_si_sched_2bis Regression	1	25 sec
TC_si_sched_2quater	30	25 sec
TC_si_sched_2ter Regression	1	25 sec
TC_si_sched_2ter_2bis Regression	1	25 sec
TC_si_sched_default Regression	1	25 sec
TC_speech_no_rtp_tchf Regression	1	16 sec
TC_speech_no_rtp_tchh Regression	1	16 sec
TC_tch_sign_l2_fill_frame	30	17 sec
TC_tch_sign_l2_fill_frame_dtxd	30	13 sec
TC_tx_power_ramp_adm_state_change	30	12 sec
TC_tx_power_start_ramp_down_bcch	30	12 sec
TC_tx_power_start_ramp_up_bcch	30	26 sec