trial-ttcn3_bts_tests:oc2g 101

Took 55 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51	5	40 sec
TC_chan_act_a52	5	39 sec
TC_chan_act_a53	12	40 sec
TC_chan_act_stress	3	30 sec
TC_conn_fail_crit	8	40 sec
TC_deact_sacch	12	31 sec
TC_encr_cmd_a51	5	39 sec
TC_encr_cmd_a52	5	39 sec
TC_encr_cmd_a53	12	39 sec
TC_ho_rach	12	39 sec
TC_meas_res_sign_sdcch4	12	39 sec
TC_meas_res_sign_sdcch8	12	39 sec
TC_meas_res_sign_tchf	12	40 sec
TC_meas_res_sign_tchh	12	40 sec
TC_meas_res_sign_tchh_toa256	12	40 sec
TC_meas_res_speech_tchf	12	28 sec
TC_meas_res_speech_tchf_facch	12	39 sec
TC_meas_res_speech_tchh	12	40 sec
TC_meas_res_speech_tchh_facch	12	40 sec
TC_meas_res_speech_tchh_toa256	12	39 sec
TC_ms_pwr_ctrl_constant	12	39 sec
TC_ms_pwr_ctrl_pf_ewma	12	39 sec
TC_paging_imsi_200percent	5	39 sec
TC_paging_imsi_80percent	5	40 sec
TC_paging_tmsi_200percent	5	40 sec
TC_paging_tmsi_80percent	5	39 sec
TC_rach_content	4	39 sec
TC_rach_content_emerg	4	39 sec
TC_rach_count	4	40 sec
TC_rach_load_count	12	2 sec
TC_rach_load_idle_below_thresh	12	2 sec
TC_rach_load_idle_thresh0	12	2 sec
TC_rach_max_ta	12	40 sec
TC_rll_est_ind	5	29 sec
TC_rll_est_req_ACCH_3	12	39 sec
TC_rll_est_req_DCCH_3	5	39 sec
TC_rll_rel_ind_ACCH_0	12	39 sec
TC_rll_rel_ind_ACCH_3	12	40 sec
TC_rll_rel_ind_DCCH_0	5	39 sec
TC_rll_rel_ind_DCCH_3	5	39 sec
TC_rll_rel_req	12	39 sec
TC_rll_unit_data_ind_ACCH	5	40 sec
TC_rll_unit_data_ind_DCCH	5	40 sec
TC_rll_unit_data_req_ACCH	12	39 sec
TC_rll_unit_data_req_DCCH	5	40 sec
TC_rsl_bs_pwr_static_ass	5	31 sec
TC_rsl_bs_pwr_static_power_control	5	39 sec
TC_rsl_chan_initial_ms_pwr	12	29 sec
TC_rsl_chan_initial_ta	12	40 sec
TC_rsl_modify_encr	12	39 sec
TC_rsl_ms_pwr_ctrl	5	40 sec
TC_rsl_ms_pwr_dyn_active	12	28 sec
TC_rsl_ms_pwr_dyn_active2	12	17 sec
TC_rsl_ms_pwr_dyn_ass_updown	12	17 sec
TC_rsl_ms_pwr_dyn_down	12	17 sec
TC_rsl_ms_pwr_dyn_max	12	17 sec
TC_rsl_ms_pwr_dyn_up	12	17 sec
TC_sacch_chan_act	12	39 sec
TC_sacch_chan_act_ho_async	12	40 sec
TC_sacch_chan_act_ho_sync	12	39 sec
TC_sacch_filling	12	39 sec
TC_sacch_info_mod	12	40 sec
TC_sacch_multi	12	39 sec
TC_sacch_multi_chg	12	40 sec
TC_si_sched_1	5	39 sec
TC_si_sched_13	5	40 sec
TC_si_sched_13_2bis_2ter_2quater	5	39 sec
TC_si_sched_2bis	5	40 sec
TC_si_sched_2quater	5	39 sec
TC_si_sched_2ter	5	40 sec
TC_si_sched_2ter_2bis	5	39 sec
TC_si_sched_default	5	29 sec
TC_speech_no_rtp_tchf	7	40 sec
TC_speech_no_rtp_tchh	5	40 sec
TC_tch_sign_l2_fill_frame	5	27 sec
TC_tch_sign_l2_fill_frame_dtxd	12	39 sec
TC_tx_power_ramp_adm_state_change	12	21 sec
TC_tx_power_start_ramp_down_bcch	12	31 sec
TC_tx_power_start_ramp_up_bcch	12	39 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	79	0	22	101	55 min