trial-ttcn3_bts_tests:oc2g 101

Took 55 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51	6	40 sec
TC_chan_act_a52	6	40 sec
TC_chan_act_a53	13	39 sec
TC_chan_act_stress	4	30 sec
TC_conn_fail_crit	9	39 sec
TC_deact_sacch	13	32 sec
TC_encr_cmd_a51	6	40 sec
TC_encr_cmd_a52	6	40 sec
TC_encr_cmd_a53	13	39 sec
TC_ho_rach	13	41 sec
TC_meas_res_sign_sdcch4	13	40 sec
TC_meas_res_sign_sdcch8	13	39 sec
TC_meas_res_sign_tchf	13	40 sec
TC_meas_res_sign_tchh	13	39 sec
TC_meas_res_sign_tchh_toa256	13	40 sec
TC_meas_res_speech_tchf	13	27 sec
TC_meas_res_speech_tchf_facch	13	39 sec
TC_meas_res_speech_tchh	13	40 sec
TC_meas_res_speech_tchh_facch	13	39 sec
TC_meas_res_speech_tchh_toa256	13	40 sec
TC_ms_pwr_ctrl_constant	13	39 sec
TC_ms_pwr_ctrl_pf_ewma	13	39 sec
TC_paging_imsi_200percent	6	39 sec
TC_paging_imsi_80percent	6	40 sec
TC_paging_tmsi_200percent	6	40 sec
TC_paging_tmsi_80percent	6	39 sec
TC_rach_content	5	40 sec
TC_rach_content_emerg	5	39 sec
TC_rach_count	5	40 sec
TC_rach_load_count	13	2 sec
TC_rach_load_idle_below_thresh	13	2 sec
TC_rach_load_idle_thresh0	13	2 sec
TC_rach_max_ta	13	39 sec
TC_rll_est_ind	6	31 sec
TC_rll_est_req_ACCH_3	13	40 sec
TC_rll_est_req_DCCH_3	6	39 sec
TC_rll_rel_ind_ACCH_0	13	39 sec
TC_rll_rel_ind_ACCH_3	13	40 sec
TC_rll_rel_ind_DCCH_0	6	39 sec
TC_rll_rel_ind_DCCH_3	6	39 sec
TC_rll_rel_req	13	39 sec
TC_rll_unit_data_ind_ACCH	6	40 sec
TC_rll_unit_data_ind_DCCH	6	39 sec
TC_rll_unit_data_req_ACCH	13	40 sec
TC_rll_unit_data_req_DCCH	6	40 sec
TC_rsl_bs_pwr_static_ass	6	31 sec
TC_rsl_bs_pwr_static_power_control	6	39 sec
TC_rsl_chan_initial_ms_pwr	13	29 sec
TC_rsl_chan_initial_ta	13	39 sec
TC_rsl_modify_encr	13	40 sec
TC_rsl_ms_pwr_ctrl	6	40 sec
TC_rsl_ms_pwr_dyn_active	13	28 sec
TC_rsl_ms_pwr_dyn_active2	13	17 sec
TC_rsl_ms_pwr_dyn_ass_updown	13	17 sec
TC_rsl_ms_pwr_dyn_down	13	17 sec
TC_rsl_ms_pwr_dyn_max	13	17 sec
TC_rsl_ms_pwr_dyn_up	13	17 sec
TC_sacch_chan_act	13	40 sec
TC_sacch_chan_act_ho_async	13	39 sec
TC_sacch_chan_act_ho_sync	13	40 sec
TC_sacch_filling	13	39 sec
TC_sacch_info_mod	13	40 sec
TC_sacch_multi	13	39 sec
TC_sacch_multi_chg	13	40 sec
TC_si_sched_1	6	39 sec
TC_si_sched_13	6	40 sec
TC_si_sched_13_2bis_2ter_2quater	6	39 sec
TC_si_sched_2bis	6	40 sec
TC_si_sched_2quater	6	39 sec
TC_si_sched_2ter	6	39 sec
TC_si_sched_2ter_2bis	6	40 sec
TC_si_sched_default	6	29 sec
TC_speech_no_rtp_tchf	8	40 sec
TC_speech_no_rtp_tchh	6	39 sec
TC_tch_sign_l2_fill_frame	6	27 sec
TC_tch_sign_l2_fill_frame_dtxd	13	39 sec
TC_tx_power_ramp_adm_state_change	13	21 sec
TC_tx_power_start_ramp_down_bcch	13	31 sec
TC_tx_power_start_ramp_up_bcch	13	39 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	79	0	22	101	55 min