trial-ttcn3_bts_tests:oc2g 101

Took 55 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51	7	40 sec
TC_chan_act_a52	7	39 sec
TC_chan_act_a53	14	39 sec
TC_chan_act_stress	5	30 sec
TC_conn_fail_crit	10	39 sec
TC_deact_sacch	14	32 sec
TC_encr_cmd_a51	7	40 sec
TC_encr_cmd_a52	7	40 sec
TC_encr_cmd_a53	14	39 sec
TC_ho_rach	14	41 sec
TC_meas_res_sign_sdcch4	14	40 sec
TC_meas_res_sign_sdcch8	14	39 sec
TC_meas_res_sign_tchf	14	40 sec
TC_meas_res_sign_tchh	14	39 sec
TC_meas_res_sign_tchh_toa256	14	40 sec
TC_meas_res_speech_tchf	14	27 sec
TC_meas_res_speech_tchf_facch	14	39 sec
TC_meas_res_speech_tchh	14	40 sec
TC_meas_res_speech_tchh_facch	14	39 sec
TC_meas_res_speech_tchh_toa256	14	39 sec
TC_ms_pwr_ctrl_constant	14	39 sec
TC_ms_pwr_ctrl_pf_ewma	14	39 sec
TC_paging_imsi_200percent	7	40 sec
TC_paging_imsi_80percent	7	40 sec
TC_paging_tmsi_200percent	7	39 sec
TC_paging_tmsi_80percent	7	39 sec
TC_rach_content	6	40 sec
TC_rach_content_emerg	6	39 sec
TC_rach_count	6	40 sec
TC_rach_load_count	14	2 sec
TC_rach_load_idle_below_thresh	14	2 sec
TC_rach_load_idle_thresh0	14	2 sec
TC_rach_max_ta	14	39 sec
TC_rll_est_ind	7	29 sec
TC_rll_est_req_ACCH_3	14	39 sec
TC_rll_est_req_DCCH_3	7	39 sec
TC_rll_rel_ind_ACCH_0	14	40 sec
TC_rll_rel_ind_ACCH_3	14	39 sec
TC_rll_rel_ind_DCCH_0	7	40 sec
TC_rll_rel_ind_DCCH_3	7	39 sec
TC_rll_rel_req	14	40 sec
TC_rll_unit_data_ind_ACCH	7	40 sec
TC_rll_unit_data_ind_DCCH	7	39 sec
TC_rll_unit_data_req_ACCH	14	40 sec
TC_rll_unit_data_req_DCCH	7	39 sec
TC_rsl_bs_pwr_static_ass	7	31 sec
TC_rsl_bs_pwr_static_power_control	7	39 sec
TC_rsl_chan_initial_ms_pwr	14	29 sec
TC_rsl_chan_initial_ta	14	40 sec
TC_rsl_modify_encr	14	40 sec
TC_rsl_ms_pwr_ctrl	7	40 sec
TC_rsl_ms_pwr_dyn_active	14	29 sec
TC_rsl_ms_pwr_dyn_active2	14	17 sec
TC_rsl_ms_pwr_dyn_ass_updown	14	17 sec
TC_rsl_ms_pwr_dyn_down	14	17 sec
TC_rsl_ms_pwr_dyn_max	14	17 sec
TC_rsl_ms_pwr_dyn_up	14	17 sec
TC_sacch_chan_act	14	39 sec
TC_sacch_chan_act_ho_async	14	39 sec
TC_sacch_chan_act_ho_sync	14	40 sec
TC_sacch_filling	14	39 sec
TC_sacch_info_mod	14	40 sec
TC_sacch_multi	14	39 sec
TC_sacch_multi_chg	14	40 sec
TC_si_sched_1	7	39 sec
TC_si_sched_13	7	40 sec
TC_si_sched_13_2bis_2ter_2quater	7	39 sec
TC_si_sched_2bis	7	39 sec
TC_si_sched_2quater	7	40 sec
TC_si_sched_2ter	7	39 sec
TC_si_sched_2ter_2bis	7	39 sec
TC_si_sched_default	7	29 sec
TC_speech_no_rtp_tchf	9	40 sec
TC_speech_no_rtp_tchh	7	39 sec
TC_tch_sign_l2_fill_frame	7	27 sec
TC_tch_sign_l2_fill_frame_dtxd	14	39 sec
TC_tx_power_ramp_adm_state_change	14	21 sec
TC_tx_power_start_ramp_down_bcch	14	31 sec
TC_tx_power_start_ramp_up_bcch	14	39 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	79	0	22	101	55 min