trial-ttcn3_bts_tests:oc2g 101

Took 55 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51	9	39 sec
TC_chan_act_a52	9	40 sec
TC_chan_act_a53	16	39 sec
TC_conn_fail_crit	12	39 sec
TC_deact_sacch	16	32 sec
TC_encr_cmd_a51	9	39 sec
TC_encr_cmd_a52	9	40 sec
TC_encr_cmd_a53	16	39 sec
TC_ho_rach	16	40 sec
TC_meas_res_sign_sdcch4	16	40 sec
TC_meas_res_sign_sdcch8	16	39 sec
TC_meas_res_sign_tchf	16	40 sec
TC_meas_res_sign_tchh	16	39 sec
TC_meas_res_sign_tchh_toa256	16	40 sec
TC_meas_res_speech_tchf	16	28 sec
TC_meas_res_speech_tchf_facch	16	39 sec
TC_meas_res_speech_tchh	16	39 sec
TC_meas_res_speech_tchh_facch	16	39 sec
TC_meas_res_speech_tchh_toa256	16	40 sec
TC_ms_pwr_ctrl_constant	16	39 sec
TC_ms_pwr_ctrl_pf_ewma	16	39 sec
TC_paging_imsi_200percent	9	39 sec
TC_paging_imsi_80percent	9	39 sec
TC_paging_tmsi_200percent	9	39 sec
TC_paging_tmsi_80percent	9	39 sec
TC_rach_content	8	39 sec
TC_rach_content_emerg	8	39 sec
TC_rach_count	8	40 sec
TC_rach_load_count	16	2 sec
TC_rach_load_idle_below_thresh	16	2 sec
TC_rach_load_idle_thresh0	16	2 sec
TC_rach_max_ta	16	39 sec
TC_rll_est_ind	9	29 sec
TC_rll_est_req_ACCH_3	16	40 sec
TC_rll_est_req_DCCH_3	9	39 sec
TC_rll_rel_ind_ACCH_0	16	40 sec
TC_rll_rel_ind_ACCH_3	16	39 sec
TC_rll_rel_ind_DCCH_0	9	39 sec
TC_rll_rel_ind_DCCH_3	9	40 sec
TC_rll_rel_req	16	39 sec
TC_rll_unit_data_ind_ACCH	9	40 sec
TC_rll_unit_data_ind_DCCH	9	40 sec
TC_rll_unit_data_req_ACCH	16	39 sec
TC_rll_unit_data_req_DCCH	9	40 sec
TC_rsl_bs_pwr_static_ass	9	31 sec
TC_rsl_bs_pwr_static_power_control	9	39 sec
TC_rsl_chan_initial_ms_pwr	16	29 sec
TC_rsl_chan_initial_ta	16	40 sec
TC_rsl_modify_encr	16	40 sec
TC_rsl_ms_pwr_ctrl	9	40 sec
TC_rsl_ms_pwr_dyn_active	16	28 sec
TC_rsl_ms_pwr_dyn_active2	16	17 sec
TC_rsl_ms_pwr_dyn_ass_updown	16	17 sec
TC_rsl_ms_pwr_dyn_down	16	17 sec
TC_rsl_ms_pwr_dyn_max	16	17 sec
TC_rsl_ms_pwr_dyn_up	16	17 sec
TC_sacch_chan_act	16	40 sec
TC_sacch_chan_act_ho_async	16	39 sec
TC_sacch_chan_act_ho_sync	16	39 sec
TC_sacch_filling	16	39 sec
TC_sacch_info_mod	16	39 sec
TC_sacch_multi	16	40 sec
TC_sacch_multi_chg	16	39 sec
TC_si_sched_1	9	39 sec
TC_si_sched_13	9	39 sec
TC_si_sched_13_2bis_2ter_2quater	9	40 sec
TC_si_sched_2bis	9	40 sec
TC_si_sched_2quater	9	40 sec
TC_si_sched_2ter	9	40 sec
TC_si_sched_2ter_2bis	9	39 sec
TC_si_sched_default	9	29 sec
TC_speech_no_rtp_tchf	11	40 sec
TC_speech_no_rtp_tchh	9	39 sec
TC_tch_sign_l2_fill_frame	9	26 sec
TC_tch_sign_l2_fill_frame_dtxd	16	39 sec
TC_tx_power_ramp_adm_state_change	16	21 sec
TC_tx_power_start_ramp_down_bcch	16	31 sec
TC_tx_power_start_ramp_up_bcch	16	39 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	78	0	23	101	55 min