1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 4.2.0 #13081 (Linux) 4 ;-------------------------------------------------------- 5 .module fpga_load 6 .optsdcc -mmcs51 --model-small 7 8 ;-------------------------------------------------------- 9 ; Public variables in this module 10 ;-------------------------------------------------------- 11 .globl _udelay 12 .globl _bitALTERA_DCLK 13 .globl _bitALTERA_DATA0 14 .globl _bitS_IN 15 .globl _bitS_OUT 16 .globl _bitS_CLK 17 .globl _EIPX6 18 .globl _EIPX5 19 .globl _EIPX4 20 .globl _PI2C 21 .globl _PUSB 22 .globl _EIEX6 23 .globl _EIEX5 24 .globl _EIEX4 25 .globl _EI2C 26 .globl _EIUSB 27 .globl _SMOD1 28 .globl _ERESI 29 .globl _RESI 30 .globl _INT6 31 .globl _CY 32 .globl _AC 33 .globl _F0 34 .globl _RS1 35 .globl _RS0 36 .globl _OV 37 .globl _FL 38 .globl _P 39 .globl _TF2 40 .globl _EXF2 41 .globl _RCLK 42 .globl _TCLK 43 .globl _EXEN2 44 .globl _TR2 45 .globl _C_T2 46 .globl _CP_RL2 47 .globl _SM01 48 .globl _SM11 49 .globl _SM21 50 .globl _REN1 51 .globl _TB81 52 .globl _RB81 53 .globl _TI1 54 .globl _RI1 55 .globl _PS1 56 .globl _PT2 57 .globl _PS0 58 .globl _PT1 59 .globl _PX1 60 .globl _PT0 61 .globl _PX0 62 .globl _EA 63 .globl _ES1 64 .globl _ET2 65 .globl _ES0 66 .globl _ET1 67 .globl _EX1 68 .globl _ET0 69 .globl _EX0 70 .globl _SM0 71 .globl _SM1 72 .globl _SM2 73 .globl _REN 74 .globl _TB8 75 .globl _RB8 76 .globl _TI 77 .globl _RI 78 .globl _TF1 79 .globl _TR1 80 .globl _TF0 81 .globl _TR0 82 .globl _IE1 83 .globl _IT1 84 .globl _IE0 85 .globl _IT0 86 .globl _SEL 87 .globl _EIP 88 .globl _B 89 .globl _EIE 90 .globl _ACC 91 .globl _EICON 92 .globl _PSW 93 .globl _TH2 94 .globl _TL2 95 .globl _RCAP2H 96 .globl _RCAP2L 97 .globl _T2CON 98 .globl _SBUF1 99 .globl _SCON1 100 .globl _GPIFSGLDATLNOX 101 .globl _GPIFSGLDATLX 102 .globl _GPIFSGLDATH 103 .globl _GPIFTRIG 104 .globl _EP01STAT 105 .globl _IP 106 .globl _OEE 107 .globl _OED 108 .globl _OEC 109 .globl _OEB 110 .globl _OEA 111 .globl _IOE 112 .globl _IOD 113 .globl _AUTOPTRSETUP 114 .globl _EP68FIFOFLGS 115 .globl _EP24FIFOFLGS 116 .globl _EP2468STAT 117 .globl _IE 118 .globl _INT4CLR 119 .globl _INT2CLR 120 .globl _IOC 121 .globl _AUTODAT2 122 .globl _AUTOPTRL2 123 .globl _AUTOPTRH2 124 .globl _AUTODAT1 125 .globl _APTR1L 126 .globl _APTR1H 127 .globl _SBUF0 128 .globl _SCON0 129 .globl _MPAGE 130 .globl _EXIF 131 .globl _IOB 132 .globl _CKCON 133 .globl _TH1 134 .globl _TH0 135 .globl _TL1 136 .globl _TL0 137 .globl _TMOD 138 .globl _TCON 139 .globl _PCON 140 .globl _DPS 141 .globl _DPH1 142 .globl _DPL1 143 .globl _DPH 144 .globl _DPL 145 .globl _SP 146 .globl _IOA 147 .globl _EP8FIFOBUF 148 .globl _EP6FIFOBUF 149 .globl _EP4FIFOBUF 150 .globl _EP2FIFOBUF 151 .globl _EP1INBUF 152 .globl _EP1OUTBUF 153 .globl _EP0BUF 154 .globl _CT4 155 .globl _CT3 156 .globl _CT2 157 .globl _CT1 158 .globl _USBTEST 159 .globl _TESTCFG 160 .globl _DBUG 161 .globl _UDMACRCQUAL 162 .globl _UDMACRCL 163 .globl _UDMACRCH 164 .globl _GPIFHOLDAMOUNT 165 .globl _FLOWSTBHPERIOD 166 .globl _FLOWSTBEDGE 167 .globl _FLOWSTB 168 .globl _FLOWHOLDOFF 169 .globl _FLOWEQ1CTL 170 .globl _FLOWEQ0CTL 171 .globl _FLOWLOGIC 172 .globl _FLOWSTATE 173 .globl _GPIFABORT 174 .globl _GPIFREADYSTAT 175 .globl _GPIFREADYCFG 176 .globl _XGPIFSGLDATLNOX 177 .globl _XGPIFSGLDATLX 178 .globl _XGPIFSGLDATH 179 .globl _EP8GPIFTRIG 180 .globl _EP8GPIFPFSTOP 181 .globl _EP8GPIFFLGSEL 182 .globl _EP6GPIFTRIG 183 .globl _EP6GPIFPFSTOP 184 .globl _EP6GPIFFLGSEL 185 .globl _EP4GPIFTRIG 186 .globl _EP4GPIFPFSTOP 187 .globl _EP4GPIFFLGSEL 188 .globl _EP2GPIFTRIG 189 .globl _EP2GPIFPFSTOP 190 .globl _EP2GPIFFLGSEL 191 .globl _GPIFTCB0 192 .globl _GPIFTCB1 193 .globl _GPIFTCB2 194 .globl _GPIFTCB3 195 .globl _GPIFADRL 196 .globl _GPIFADRH 197 .globl _GPIFCTLCFG 198 .globl _GPIFIDLECTL 199 .globl _GPIFIDLECS 200 .globl _GPIFWFSELECT 201 .globl _SETUPDAT 202 .globl _SUDPTRCTL 203 .globl _SUDPTRL 204 .globl _SUDPTRH 205 .globl _EP8FIFOBCL 206 .globl _EP8FIFOBCH 207 .globl _EP6FIFOBCL 208 .globl _EP6FIFOBCH 209 .globl _EP4FIFOBCL 210 .globl _EP4FIFOBCH 211 .globl _EP2FIFOBCL 212 .globl _EP2FIFOBCH 213 .globl _EP8FIFOFLGS 214 .globl _EP6FIFOFLGS 215 .globl _EP4FIFOFLGS 216 .globl _EP2FIFOFLGS 217 .globl _EP8CS 218 .globl _EP6CS 219 .globl _EP4CS 220 .globl _EP2CS 221 .globl _EP1INCS 222 .globl _EP1OUTCS 223 .globl _EP0CS 224 .globl _EP8BCL 225 .globl _EP8BCH 226 .globl _EP6BCL 227 .globl _EP6BCH 228 .globl _EP4BCL 229 .globl _EP4BCH 230 .globl _EP2BCL 231 .globl _EP2BCH 232 .globl _EP1INBC 233 .globl _EP1OUTBC 234 .globl _EP0BCL 235 .globl _EP0BCH 236 .globl _FNADDR 237 .globl _MICROFRAME 238 .globl _USBFRAMEL 239 .globl _USBFRAMEH 240 .globl _TOGCTL 241 .globl _WAKEUPCS 242 .globl _SUSPEND 243 .globl _USBCS 244 .globl _XAUTODAT2 245 .globl _XAUTODAT1 246 .globl _I2CTL 247 .globl _I2DAT 248 .globl _I2CS 249 .globl _PORTECFG 250 .globl _PORTCCFG 251 .globl _PORTACFG 252 .globl _INTSETUP 253 .globl _INT4IVEC 254 .globl _INT2IVEC 255 .globl _CLRERRCNT 256 .globl _ERRCNTLIM 257 .globl _USBERRIRQ 258 .globl _USBERRIE 259 .globl _GPIFIRQ 260 .globl _GPIFIE 261 .globl _EPIRQ 262 .globl _EPIE 263 .globl _USBIRQ 264 .globl _USBIE 265 .globl _NAKIRQ 266 .globl _NAKIE 267 .globl _IBNIRQ 268 .globl _IBNIE 269 .globl _EP8FIFOIRQ 270 .globl _EP8FIFOIE 271 .globl _EP6FIFOIRQ 272 .globl _EP6FIFOIE 273 .globl _EP4FIFOIRQ 274 .globl _EP4FIFOIE 275 .globl _EP2FIFOIRQ 276 .globl _EP2FIFOIE 277 .globl _OUTPKTEND 278 .globl _INPKTEND 279 .globl _EP8ISOINPKTS 280 .globl _EP6ISOINPKTS 281 .globl _EP4ISOINPKTS 282 .globl _EP2ISOINPKTS 283 .globl _EP8FIFOPFL 284 .globl _EP8FIFOPFH 285 .globl _EP6FIFOPFL 286 .globl _EP6FIFOPFH 287 .globl _EP4FIFOPFL 288 .globl _EP4FIFOPFH 289 .globl _EP2FIFOPFL 290 .globl _EP2FIFOPFH 291 .globl _EP8AUTOINLENL 292 .globl _EP8AUTOINLENH 293 .globl _EP6AUTOINLENL 294 .globl _EP6AUTOINLENH 295 .globl _EP4AUTOINLENL 296 .globl _EP4AUTOINLENH 297 .globl _EP2AUTOINLENL 298 .globl _EP2AUTOINLENH 299 .globl _EP8FIFOCFG 300 .globl _EP6FIFOCFG 301 .globl _EP4FIFOCFG 302 .globl _EP2FIFOCFG 303 .globl _EP8CFG 304 .globl _EP6CFG 305 .globl _EP4CFG 306 .globl _EP2CFG 307 .globl _EP1INCFG 308 .globl _EP1OUTCFG 309 .globl _REVCTL 310 .globl _REVID 311 .globl _FIFOPINPOLAR 312 .globl _UART230 313 .globl _BPADDRL 314 .globl _BPADDRH 315 .globl _BREAKPT 316 .globl _FIFORESET 317 .globl _PINFLAGSCD 318 .globl _PINFLAGSAB 319 .globl _IFCONFIG 320 .globl _CPUCS 321 .globl _RES_WAVEDATA_END 322 .globl _GPIF_WAVE_DATA 323 .globl _fpga_load_xfer_PARM_2 324 .globl _fpga_load_begin 325 .globl _fpga_load_xfer 326 .globl _fpga_load_end 327 ;-------------------------------------------------------- 328 ; special function registers 329 ;-------------------------------------------------------- 330 .area RSEG (ABS,DATA) 000000 331 .org 0x0000 000080 332 _IOA = 0x0080 000081 333 _SP = 0x0081 000082 334 _DPL = 0x0082 000083 335 _DPH = 0x0083 000084 336 _DPL1 = 0x0084 000085 337 _DPH1 = 0x0085 000086 338 _DPS = 0x0086 000087 339 _PCON = 0x0087 000088 340 _TCON = 0x0088 000089 341 _TMOD = 0x0089 00008A 342 _TL0 = 0x008a 00008B 343 _TL1 = 0x008b 00008C 344 _TH0 = 0x008c 00008D 345 _TH1 = 0x008d 00008E 346 _CKCON = 0x008e 000090 347 _IOB = 0x0090 000091 348 _EXIF = 0x0091 000092 349 _MPAGE = 0x0092 000098 350 _SCON0 = 0x0098 000099 351 _SBUF0 = 0x0099 00009A 352 _APTR1H = 0x009a 00009B 353 _APTR1L = 0x009b 00009C 354 _AUTODAT1 = 0x009c 00009D 355 _AUTOPTRH2 = 0x009d 00009E 356 _AUTOPTRL2 = 0x009e 00009F 357 _AUTODAT2 = 0x009f 0000A0 358 _IOC = 0x00a0 0000A1 359 _INT2CLR = 0x00a1 0000A2 360 _INT4CLR = 0x00a2 0000A8 361 _IE = 0x00a8 0000AA 362 _EP2468STAT = 0x00aa 0000AB 363 _EP24FIFOFLGS = 0x00ab 0000AC 364 _EP68FIFOFLGS = 0x00ac 0000AF 365 _AUTOPTRSETUP = 0x00af 0000B0 366 _IOD = 0x00b0 0000B1 367 _IOE = 0x00b1 0000B2 368 _OEA = 0x00b2 0000B3 369 _OEB = 0x00b3 0000B4 370 _OEC = 0x00b4 0000B5 371 _OED = 0x00b5 0000B6 372 _OEE = 0x00b6 0000B8 373 _IP = 0x00b8 0000BA 374 _EP01STAT = 0x00ba 0000BB 375 _GPIFTRIG = 0x00bb 0000BD 376 _GPIFSGLDATH = 0x00bd 0000BE 377 _GPIFSGLDATLX = 0x00be 0000BF 378 _GPIFSGLDATLNOX = 0x00bf 0000C0 379 _SCON1 = 0x00c0 0000C1 380 _SBUF1 = 0x00c1 0000C8 381 _T2CON = 0x00c8 0000CA 382 _RCAP2L = 0x00ca 0000CB 383 _RCAP2H = 0x00cb 0000CC 384 _TL2 = 0x00cc 0000CD 385 _TH2 = 0x00cd 0000D0 386 _PSW = 0x00d0 0000D8 387 _EICON = 0x00d8 0000E0 388 _ACC = 0x00e0 0000E8 389 _EIE = 0x00e8 0000F0 390 _B = 0x00f0 0000F8 391 _EIP = 0x00f8 392 ;-------------------------------------------------------- 393 ; special function bits 394 ;-------------------------------------------------------- 395 .area RSEG (ABS,DATA) 000000 396 .org 0x0000 000086 397 _SEL = 0x0086 000088 398 _IT0 = 0x0088 000089 399 _IE0 = 0x0089 00008A 400 _IT1 = 0x008a 00008B 401 _IE1 = 0x008b 00008C 402 _TR0 = 0x008c 00008D 403 _TF0 = 0x008d 00008E 404 _TR1 = 0x008e 00008F 405 _TF1 = 0x008f 000098 406 _RI = 0x0098 000099 407 _TI = 0x0099 00009A 408 _RB8 = 0x009a 00009B 409 _TB8 = 0x009b 00009C 410 _REN = 0x009c 00009D 411 _SM2 = 0x009d 00009E 412 _SM1 = 0x009e 00009F 413 _SM0 = 0x009f 0000A8 414 _EX0 = 0x00a8 0000A9 415 _ET0 = 0x00a9 0000AA 416 _EX1 = 0x00aa 0000AB 417 _ET1 = 0x00ab 0000AC 418 _ES0 = 0x00ac 0000AD 419 _ET2 = 0x00ad 0000AE 420 _ES1 = 0x00ae 0000AF 421 _EA = 0x00af 0000B8 422 _PX0 = 0x00b8 0000B9 423 _PT0 = 0x00b9 0000BA 424 _PX1 = 0x00ba 0000BB 425 _PT1 = 0x00bb 0000BC 426 _PS0 = 0x00bc 0000BD 427 _PT2 = 0x00bd 0000BE 428 _PS1 = 0x00be 0000C0 429 _RI1 = 0x00c0 0000C1 430 _TI1 = 0x00c1 0000C2 431 _RB81 = 0x00c2 0000C3 432 _TB81 = 0x00c3 0000C4 433 _REN1 = 0x00c4 0000C5 434 _SM21 = 0x00c5 0000C6 435 _SM11 = 0x00c6 0000C7 436 _SM01 = 0x00c7 0000C8 437 _CP_RL2 = 0x00c8 0000C9 438 _C_T2 = 0x00c9 0000CA 439 _TR2 = 0x00ca 0000CB 440 _EXEN2 = 0x00cb 0000CC 441 _TCLK = 0x00cc 0000CD 442 _RCLK = 0x00cd 0000CE 443 _EXF2 = 0x00ce 0000CF 444 _TF2 = 0x00cf 0000D0 445 _P = 0x00d0 0000D1 446 _FL = 0x00d1 0000D2 447 _OV = 0x00d2 0000D3 448 _RS0 = 0x00d3 0000D4 449 _RS1 = 0x00d4 0000D5 450 _F0 = 0x00d5 0000D6 451 _AC = 0x00d6 0000D7 452 _CY = 0x00d7 0000DB 453 _INT6 = 0x00db 0000DC 454 _RESI = 0x00dc 0000DD 455 _ERESI = 0x00dd 0000DF 456 _SMOD1 = 0x00df 0000E8 457 _EIUSB = 0x00e8 0000E9 458 _EI2C = 0x00e9 0000EA 459 _EIEX4 = 0x00ea 0000EB 460 _EIEX5 = 0x00eb 0000EC 461 _EIEX6 = 0x00ec 0000F8 462 _PUSB = 0x00f8 0000F9 463 _PI2C = 0x00f9 0000FA 464 _EIPX4 = 0x00fa 0000FB 465 _EIPX5 = 0x00fb 0000FC 466 _EIPX6 = 0x00fc 000080 467 _bitS_CLK = 0x0080 000081 468 _bitS_OUT = 0x0081 000082 469 _bitS_IN = 0x0082 0000A1 470 _bitALTERA_DATA0 = 0x00a1 0000A3 471 _bitALTERA_DCLK = 0x00a3 472 ;-------------------------------------------------------- 473 ; overlayable register banks 474 ;-------------------------------------------------------- 475 .area REG_BANK_0 (REL,OVR,DATA) 000000 476 .ds 8 477 ;-------------------------------------------------------- 478 ; internal ram data 479 ;-------------------------------------------------------- 480 .area DSEG (DATA) 000010 481 _clock_out_bytes_PARM_2: 000010 482 .ds 2 000012 483 _fpga_load_xfer_PARM_2: 000012 484 .ds 1 485 ;-------------------------------------------------------- 486 ; overlayable items in internal ram 487 ;-------------------------------------------------------- 488 .area OSEG (OVR,DATA) 489 .area OSEG (OVR,DATA) 490 ;-------------------------------------------------------- 491 ; indirectly addressable internal ram data 492 ;-------------------------------------------------------- 493 .area ISEG (DATA) 494 ;-------------------------------------------------------- 495 ; absolute internal ram data 496 ;-------------------------------------------------------- 497 .area IABS (ABS,DATA) 498 .area IABS (ABS,DATA) 499 ;-------------------------------------------------------- 500 ; bit data 501 ;-------------------------------------------------------- 502 .area BSEG (BIT) 503 ;-------------------------------------------------------- 504 ; paged external ram data 505 ;-------------------------------------------------------- 506 .area PSEG (PAG,XDATA) 507 ;-------------------------------------------------------- 508 ; external ram data 509 ;-------------------------------------------------------- 510 .area XSEG (XDATA) 00E400 511 _GPIF_WAVE_DATA = 0xe400 00E480 512 _RES_WAVEDATA_END = 0xe480 00E600 513 _CPUCS = 0xe600 00E601 514 _IFCONFIG = 0xe601 00E602 515 _PINFLAGSAB = 0xe602 00E603 516 _PINFLAGSCD = 0xe603 00E604 517 _FIFORESET = 0xe604 00E605 518 _BREAKPT = 0xe605 00E606 519 _BPADDRH = 0xe606 00E607 520 _BPADDRL = 0xe607 00E608 521 _UART230 = 0xe608 00E609 522 _FIFOPINPOLAR = 0xe609 00E60A 523 _REVID = 0xe60a 00E60B 524 _REVCTL = 0xe60b 00E610 525 _EP1OUTCFG = 0xe610 00E611 526 _EP1INCFG = 0xe611 00E612 527 _EP2CFG = 0xe612 00E613 528 _EP4CFG = 0xe613 00E614 529 _EP6CFG = 0xe614 00E615 530 _EP8CFG = 0xe615 00E618 531 _EP2FIFOCFG = 0xe618 00E619 532 _EP4FIFOCFG = 0xe619 00E61A 533 _EP6FIFOCFG = 0xe61a 00E61B 534 _EP8FIFOCFG = 0xe61b 00E620 535 _EP2AUTOINLENH = 0xe620 00E621 536 _EP2AUTOINLENL = 0xe621 00E622 537 _EP4AUTOINLENH = 0xe622 00E623 538 _EP4AUTOINLENL = 0xe623 00E624 539 _EP6AUTOINLENH = 0xe624 00E625 540 _EP6AUTOINLENL = 0xe625 00E626 541 _EP8AUTOINLENH = 0xe626 00E627 542 _EP8AUTOINLENL = 0xe627 00E630 543 _EP2FIFOPFH = 0xe630 00E631 544 _EP2FIFOPFL = 0xe631 00E632 545 _EP4FIFOPFH = 0xe632 00E633 546 _EP4FIFOPFL = 0xe633 00E634 547 _EP6FIFOPFH = 0xe634 00E635 548 _EP6FIFOPFL = 0xe635 00E636 549 _EP8FIFOPFH = 0xe636 00E637 550 _EP8FIFOPFL = 0xe637 00E640 551 _EP2ISOINPKTS = 0xe640 00E641 552 _EP4ISOINPKTS = 0xe641 00E642 553 _EP6ISOINPKTS = 0xe642 00E643 554 _EP8ISOINPKTS = 0xe643 00E648 555 _INPKTEND = 0xe648 00E649 556 _OUTPKTEND = 0xe649 00E650 557 _EP2FIFOIE = 0xe650 00E651 558 _EP2FIFOIRQ = 0xe651 00E652 559 _EP4FIFOIE = 0xe652 00E653 560 _EP4FIFOIRQ = 0xe653 00E654 561 _EP6FIFOIE = 0xe654 00E655 562 _EP6FIFOIRQ = 0xe655 00E656 563 _EP8FIFOIE = 0xe656 00E657 564 _EP8FIFOIRQ = 0xe657 00E658 565 _IBNIE = 0xe658 00E659 566 _IBNIRQ = 0xe659 00E65A 567 _NAKIE = 0xe65a 00E65B 568 _NAKIRQ = 0xe65b 00E65C 569 _USBIE = 0xe65c 00E65D 570 _USBIRQ = 0xe65d 00E65E 571 _EPIE = 0xe65e 00E65F 572 _EPIRQ = 0xe65f 00E660 573 _GPIFIE = 0xe660 00E661 574 _GPIFIRQ = 0xe661 00E662 575 _USBERRIE = 0xe662 00E663 576 _USBERRIRQ = 0xe663 00E664 577 _ERRCNTLIM = 0xe664 00E665 578 _CLRERRCNT = 0xe665 00E666 579 _INT2IVEC = 0xe666 00E667 580 _INT4IVEC = 0xe667 00E668 581 _INTSETUP = 0xe668 00E670 582 _PORTACFG = 0xe670 00E671 583 _PORTCCFG = 0xe671 00E672 584 _PORTECFG = 0xe672 00E678 585 _I2CS = 0xe678 00E679 586 _I2DAT = 0xe679 00E67A 587 _I2CTL = 0xe67a 00E67B 588 _XAUTODAT1 = 0xe67b 00E67C 589 _XAUTODAT2 = 0xe67c 00E680 590 _USBCS = 0xe680 00E681 591 _SUSPEND = 0xe681 00E682 592 _WAKEUPCS = 0xe682 00E683 593 _TOGCTL = 0xe683 00E684 594 _USBFRAMEH = 0xe684 00E685 595 _USBFRAMEL = 0xe685 00E686 596 _MICROFRAME = 0xe686 00E687 597 _FNADDR = 0xe687 00E68A 598 _EP0BCH = 0xe68a 00E68B 599 _EP0BCL = 0xe68b 00E68D 600 _EP1OUTBC = 0xe68d 00E68F 601 _EP1INBC = 0xe68f 00E690 602 _EP2BCH = 0xe690 00E691 603 _EP2BCL = 0xe691 00E694 604 _EP4BCH = 0xe694 00E695 605 _EP4BCL = 0xe695 00E698 606 _EP6BCH = 0xe698 00E699 607 _EP6BCL = 0xe699 00E69C 608 _EP8BCH = 0xe69c 00E69D 609 _EP8BCL = 0xe69d 00E6A0 610 _EP0CS = 0xe6a0 00E6A1 611 _EP1OUTCS = 0xe6a1 00E6A2 612 _EP1INCS = 0xe6a2 00E6A3 613 _EP2CS = 0xe6a3 00E6A4 614 _EP4CS = 0xe6a4 00E6A5 615 _EP6CS = 0xe6a5 00E6A6 616 _EP8CS = 0xe6a6 00E6A7 617 _EP2FIFOFLGS = 0xe6a7 00E6A8 618 _EP4FIFOFLGS = 0xe6a8 00E6A9 619 _EP6FIFOFLGS = 0xe6a9 00E6AA 620 _EP8FIFOFLGS = 0xe6aa 00E6AB 621 _EP2FIFOBCH = 0xe6ab 00E6AC 622 _EP2FIFOBCL = 0xe6ac 00E6AD 623 _EP4FIFOBCH = 0xe6ad 00E6AE 624 _EP4FIFOBCL = 0xe6ae 00E6AF 625 _EP6FIFOBCH = 0xe6af 00E6B0 626 _EP6FIFOBCL = 0xe6b0 00E6B1 627 _EP8FIFOBCH = 0xe6b1 00E6B2 628 _EP8FIFOBCL = 0xe6b2 00E6B3 629 _SUDPTRH = 0xe6b3 00E6B4 630 _SUDPTRL = 0xe6b4 00E6B5 631 _SUDPTRCTL = 0xe6b5 00E6B8 632 _SETUPDAT = 0xe6b8 00E6C0 633 _GPIFWFSELECT = 0xe6c0 00E6C1 634 _GPIFIDLECS = 0xe6c1 00E6C2 635 _GPIFIDLECTL = 0xe6c2 00E6C3 636 _GPIFCTLCFG = 0xe6c3 00E6C4 637 _GPIFADRH = 0xe6c4 00E6C5 638 _GPIFADRL = 0xe6c5 00E6CE 639 _GPIFTCB3 = 0xe6ce 00E6CF 640 _GPIFTCB2 = 0xe6cf 00E6D0 641 _GPIFTCB1 = 0xe6d0 00E6D1 642 _GPIFTCB0 = 0xe6d1 00E6D2 643 _EP2GPIFFLGSEL = 0xe6d2 00E6D3 644 _EP2GPIFPFSTOP = 0xe6d3 00E6D4 645 _EP2GPIFTRIG = 0xe6d4 00E6DA 646 _EP4GPIFFLGSEL = 0xe6da 00E6DB 647 _EP4GPIFPFSTOP = 0xe6db 00E6DC 648 _EP4GPIFTRIG = 0xe6dc 00E6E2 649 _EP6GPIFFLGSEL = 0xe6e2 00E6E3 650 _EP6GPIFPFSTOP = 0xe6e3 00E6E4 651 _EP6GPIFTRIG = 0xe6e4 00E6EA 652 _EP8GPIFFLGSEL = 0xe6ea 00E6EB 653 _EP8GPIFPFSTOP = 0xe6eb 00E6EC 654 _EP8GPIFTRIG = 0xe6ec 00E6F0 655 _XGPIFSGLDATH = 0xe6f0 00E6F1 656 _XGPIFSGLDATLX = 0xe6f1 00E6F2 657 _XGPIFSGLDATLNOX = 0xe6f2 00E6F3 658 _GPIFREADYCFG = 0xe6f3 00E6F4 659 _GPIFREADYSTAT = 0xe6f4 00E6F5 660 _GPIFABORT = 0xe6f5 00E6C6 661 _FLOWSTATE = 0xe6c6 00E6C7 662 _FLOWLOGIC = 0xe6c7 00E6C8 663 _FLOWEQ0CTL = 0xe6c8 00E6C9 664 _FLOWEQ1CTL = 0xe6c9 00E6CA 665 _FLOWHOLDOFF = 0xe6ca 00E6CB 666 _FLOWSTB = 0xe6cb 00E6CC 667 _FLOWSTBEDGE = 0xe6cc 00E6CD 668 _FLOWSTBHPERIOD = 0xe6cd 00E60C 669 _GPIFHOLDAMOUNT = 0xe60c 00E67D 670 _UDMACRCH = 0xe67d 00E67E 671 _UDMACRCL = 0xe67e 00E67F 672 _UDMACRCQUAL = 0xe67f 00E6F8 673 _DBUG = 0xe6f8 00E6F9 674 _TESTCFG = 0xe6f9 00E6FA 675 _USBTEST = 0xe6fa 00E6FB 676 _CT1 = 0xe6fb 00E6FC 677 _CT2 = 0xe6fc 00E6FD 678 _CT3 = 0xe6fd 00E6FE 679 _CT4 = 0xe6fe 00E740 680 _EP0BUF = 0xe740 00E780 681 _EP1OUTBUF = 0xe780 00E7C0 682 _EP1INBUF = 0xe7c0 00F000 683 _EP2FIFOBUF = 0xf000 00F400 684 _EP4FIFOBUF = 0xf400 00F800 685 _EP6FIFOBUF = 0xf800 00FC00 686 _EP8FIFOBUF = 0xfc00 687 ;-------------------------------------------------------- 688 ; absolute external ram data 689 ;-------------------------------------------------------- 690 .area XABS (ABS,XDATA) 691 ;-------------------------------------------------------- 692 ; external initialized ram data 693 ;-------------------------------------------------------- 694 .area HOME (CODE) 695 .area GSINIT0 (CODE) 696 .area GSINIT1 (CODE) 697 .area GSINIT2 (CODE) 698 .area GSINIT3 (CODE) 699 .area GSINIT4 (CODE) 700 .area GSINIT5 (CODE) 701 .area GSINIT (CODE) 702 .area GSFINAL (CODE) 703 .area CSEG (CODE) 704 ;-------------------------------------------------------- 705 ; global & static initialisations 706 ;-------------------------------------------------------- 707 .area HOME (CODE) 708 .area GSINIT (CODE) 709 .area GSFINAL (CODE) 710 .area GSINIT (CODE) 711 ;-------------------------------------------------------- 712 ; Home 713 ;-------------------------------------------------------- 714 .area HOME (CODE) 715 .area HOME (CODE) 716 ;-------------------------------------------------------- 717 ; code 718 ;-------------------------------------------------------- 719 .area CSEG (CODE) 720 ;------------------------------------------------------------ 721 ;Allocation info for local variables in function 'fpga_load_begin' 722 ;------------------------------------------------------------ 723 ; ../common/fpga_load.c:37: fpga_load_begin (void) 724 ; ----------------------------------------- 725 ; function fpga_load_begin 726 ; ----------------------------------------- 00067E 727 _fpga_load_begin: 000007 728 ar7 = 0x07 000006 729 ar6 = 0x06 000005 730 ar5 = 0x05 000004 731 ar4 = 0x04 000003 732 ar3 = 0x03 000002 733 ar2 = 0x02 000001 734 ar1 = 0x01 000000 735 ar0 = 0x00 736 ; ../common/fpga_load.c:39: USRP_ALTERA_CONFIG &= ~bmALTERA_BITS; // clear all bits (NCONFIG low) 00067E 53 A0 C1 [24] 737 anl _IOC,#0xc1 738 ; ../common/fpga_load.c:40: udelay (40); // wait 40 us 000681 75 82 28 [24] 739 mov dpl,#0x28 000684 12 12 34 [24] 740 lcall _udelay 741 ; ../common/fpga_load.c:41: USRP_ALTERA_CONFIG |= bmALTERA_NCONFIG; // set NCONFIG high 000687 43 A0 04 [24] 742 orl _IOC,#0x04 743 ; ../common/fpga_load.c:46: while ((USRP_ALTERA_CONFIG & bmALTERA_NSTATUS) == 0) // wait for NSTATUS to go high 00068A 744 00101$: 00068A E5 A0 [12] 745 mov a,_IOC 00068C 30 E5 FB [24] 746 jnb acc.5,00101$ 747 ; ../common/fpga_load.c:52: return 1; 00068F 75 82 01 [24] 748 mov dpl,#0x01 749 ; ../common/fpga_load.c:53: } 000692 22 [24] 750 ret 751 ;------------------------------------------------------------ 752 ;Allocation info for local variables in function 'clock_out_config_byte' 753 ;------------------------------------------------------------ 754 ;bits Allocated to registers 755 ;------------------------------------------------------------ 756 ; ../common/fpga_load.c:92: clock_out_config_byte (unsigned char bits) __naked 757 ; ----------------------------------------- 758 ; function clock_out_config_byte 759 ; ----------------------------------------- 000693 760 _clock_out_config_byte: 761 ; naked function: no prologue. 762 ; ../common/fpga_load.c:139: __endasm; 000693 E5 82 [12] 763 mov a, dpl 000695 13 [12] 764 rrc a 000696 92 A1 [24] 765 mov _bitALTERA_DATA0,c 000698 D2 A3 [12] 766 setb _bitALTERA_DCLK 00069A C2 A3 [12] 767 clr _bitALTERA_DCLK 00069C 13 [12] 768 rrc a 00069D 92 A1 [24] 769 mov _bitALTERA_DATA0,c 00069F D2 A3 [12] 770 setb _bitALTERA_DCLK 0006A1 C2 A3 [12] 771 clr _bitALTERA_DCLK 0006A3 13 [12] 772 rrc a 0006A4 92 A1 [24] 773 mov _bitALTERA_DATA0,c 0006A6 D2 A3 [12] 774 setb _bitALTERA_DCLK 0006A8 C2 A3 [12] 775 clr _bitALTERA_DCLK 0006AA 13 [12] 776 rrc a 0006AB 92 A1 [24] 777 mov _bitALTERA_DATA0,c 0006AD D2 A3 [12] 778 setb _bitALTERA_DCLK 0006AF C2 A3 [12] 779 clr _bitALTERA_DCLK 0006B1 13 [12] 780 rrc a 0006B2 92 A1 [24] 781 mov _bitALTERA_DATA0,c 0006B4 D2 A3 [12] 782 setb _bitALTERA_DCLK 0006B6 C2 A3 [12] 783 clr _bitALTERA_DCLK 0006B8 13 [12] 784 rrc a 0006B9 92 A1 [24] 785 mov _bitALTERA_DATA0,c 0006BB D2 A3 [12] 786 setb _bitALTERA_DCLK 0006BD C2 A3 [12] 787 clr _bitALTERA_DCLK 0006BF 13 [12] 788 rrc a 0006C0 92 A1 [24] 789 mov _bitALTERA_DATA0,c 0006C2 D2 A3 [12] 790 setb _bitALTERA_DCLK 0006C4 C2 A3 [12] 791 clr _bitALTERA_DCLK 0006C6 13 [12] 792 rrc a 0006C7 92 A1 [24] 793 mov _bitALTERA_DATA0,c 0006C9 D2 A3 [12] 794 setb _bitALTERA_DCLK 0006CB C2 A3 [12] 795 clr _bitALTERA_DCLK 0006CD 22 [24] 796 ret 797 ; ../common/fpga_load.c:140: } 798 ; naked function: no epilogue. 799 ;------------------------------------------------------------ 800 ;Allocation info for local variables in function 'clock_out_bytes' 801 ;------------------------------------------------------------ 802 ;p Allocated with name '_clock_out_bytes_PARM_2' 803 ;bytecount Allocated to registers 804 ;------------------------------------------------------------ 805 ; ../common/fpga_load.c:145: clock_out_bytes (unsigned char bytecount, 806 ; ----------------------------------------- 807 ; function clock_out_bytes 808 ; ----------------------------------------- 0006CE 809 _clock_out_bytes: 0006CE AF 82 [24] 810 mov r7,dpl 811 ; ../common/fpga_load.c:148: while (bytecount-- > 0) 0006D0 AD 10 [24] 812 mov r5,_clock_out_bytes_PARM_2 0006D2 AE 11 [24] 813 mov r6,(_clock_out_bytes_PARM_2 + 1) 0006D4 814 00101$: 0006D4 8F 04 [24] 815 mov ar4,r7 0006D6 1F [12] 816 dec r7 0006D7 EC [12] 817 mov a,r4 0006D8 60 12 [24] 818 jz 00104$ 819 ; ../common/fpga_load.c:149: clock_out_config_byte (*p++); 0006DA 8D 82 [24] 820 mov dpl,r5 0006DC 8E 83 [24] 821 mov dph,r6 0006DE E0 [24] 822 movx a,@dptr 0006DF FC [12] 823 mov r4,a 0006E0 A3 [24] 824 inc dptr 0006E1 AD 82 [24] 825 mov r5,dpl 0006E3 AE 83 [24] 826 mov r6,dph 0006E5 8C 82 [24] 827 mov dpl,r4 0006E7 12 06 93 [24] 828 lcall _clock_out_config_byte 0006EA 80 E8 [24] 829 sjmp 00101$ 0006EC 830 00104$: 831 ; ../common/fpga_load.c:150: } 0006EC 22 [24] 832 ret 833 ;------------------------------------------------------------ 834 ;Allocation info for local variables in function 'fpga_load_xfer' 835 ;------------------------------------------------------------ 836 ;bytecount Allocated with name '_fpga_load_xfer_PARM_2' 837 ;p Allocated to registers 838 ;------------------------------------------------------------ 839 ; ../common/fpga_load.c:166: fpga_load_xfer (__xdata unsigned char *p, unsigned char bytecount) 840 ; ----------------------------------------- 841 ; function fpga_load_xfer 842 ; ----------------------------------------- 0006ED 843 _fpga_load_xfer: 0006ED 85 82 10 [24] 844 mov _clock_out_bytes_PARM_2,dpl 0006F0 85 83 11 [24] 845 mov (_clock_out_bytes_PARM_2 + 1),dph 846 ; ../common/fpga_load.c:168: clock_out_bytes (bytecount, p); 0006F3 85 12 82 [24] 847 mov dpl,_fpga_load_xfer_PARM_2 0006F6 12 06 CE [24] 848 lcall _clock_out_bytes 849 ; ../common/fpga_load.c:169: return 1; 0006F9 75 82 01 [24] 850 mov dpl,#0x01 851 ; ../common/fpga_load.c:170: } 0006FC 22 [24] 852 ret 853 ;------------------------------------------------------------ 854 ;Allocation info for local variables in function 'fpga_load_end' 855 ;------------------------------------------------------------ 856 ;status Allocated to registers r7 857 ;------------------------------------------------------------ 858 ; ../common/fpga_load.c:176: fpga_load_end (void) 859 ; ----------------------------------------- 860 ; function fpga_load_end 861 ; ----------------------------------------- 0006FD 862 _fpga_load_end: 863 ; ../common/fpga_load.c:178: unsigned char status = USRP_ALTERA_CONFIG; 864 ; ../common/fpga_load.c:183: if ((status & bmALTERA_NSTATUS) == 0) // failed to program 0006FD E5 A0 [12] 865 mov a,_IOC 0006FF FF [12] 866 mov r7,a 000700 20 E5 04 [24] 867 jb acc.5,00104$ 868 ; ../common/fpga_load.c:184: return 0; 000703 75 82 00 [24] 869 mov dpl,#0x00 000706 22 [24] 870 ret 000707 871 00104$: 872 ; ../common/fpga_load.c:186: if ((status & bmALTERA_CONF_DONE) == bmALTERA_CONF_DONE) 000707 53 07 10 [24] 873 anl ar7,#0x10 00070A 7E 00 [12] 874 mov r6,#0x00 00070C BF 10 07 [24] 875 cjne r7,#0x10,00106$ 00070F BE 00 04 [24] 876 cjne r6,#0x00,00106$ 877 ; ../common/fpga_load.c:187: return 1; // everything's cool 000712 75 82 01 [24] 878 mov dpl,#0x01 000715 22 [24] 879 ret 000716 880 00106$: 881 ; ../common/fpga_load.c:192: return 0; 000716 75 82 00 [24] 882 mov dpl,#0x00 883 ; ../common/fpga_load.c:193: } 000719 22 [24] 884 ret 885 .area CSEG (CODE) 886 .area CONST (CODE) 887 .area CABS (ABS,CODE)