2024-10-31 07:39:34 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.201.20:5700'
2024-10-31 07:39:34 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.201.20:5802)
2024-10-31 07:39:34 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.201.20:5801)
2024-10-31 07:39:34 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.201.22:6700'
2024-10-31 07:39:34 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.201.22:6802)
2024-10-31 07:39:34 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.201.22:6801)
2024-10-31 07:39:34 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.201.20:5700/1'
2024-10-31 07:39:34 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.201.20:5804)
2024-10-31 07:39:34 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.201.20:5803)
2024-10-31 07:39:34 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.201.20:5700/2'
2024-10-31 07:39:34 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.201.20:5806)
2024-10-31 07:39:34 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.201.20:5805)
2024-10-31 07:39:34 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.201.20:5700/3'
2024-10-31 07:39:34 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.201.20:5808)
2024-10-31 07:39:34 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.201.20:5807)
2024-10-31 07:39:34 [INFO] fake_trx.py:423 Init complete
2024-10-31 07:39:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:39:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:39:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:39:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:39:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:39:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:39:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:39:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 0 -> 1
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:39:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:39:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 0 -> 1
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:39:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:39:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 0 -> 1
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:39:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:39:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 0 -> 1
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:39:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:39:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:39:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:39:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:39:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:39:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:39:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:39:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:39:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:39:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:39:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:39:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:39:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:39:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:39:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:39:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
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2024-10-31 07:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
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2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
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2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:39:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:39:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:40:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:40:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:40:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:40:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:40:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:40:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:40:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:40:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:40:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:40:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:40:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:40:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:40:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:40:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:40:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:40:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:40:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:40:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:40:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:40:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:40:20 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:40:20 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:40:20 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:40:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:40:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:40:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:40:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:40:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 07:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 07:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 07:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 07:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 07:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 07:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 07:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 07:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 07:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 07:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 07:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 07:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 07:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:40:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 07:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 07:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 07:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 07:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 07:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 07:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 07:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 07:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 07:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:01 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=8919 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 07:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 07:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 07:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 07:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 07:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 07:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 07:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 07:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 07:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 07:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 07:41:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 07:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 07:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 07:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 07:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 07:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 07:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 07:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 07:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 07:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 07:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 07:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 07:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 07:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 07:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 07:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 07:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 07:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 07:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 07:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 07:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 07:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 07:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 07:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 07:41:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 07:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 07:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 07:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 07:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 07:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 07:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 07:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 07:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 07:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 07:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 07:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 07:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 07:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 07:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 07:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 07:41:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 07:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 07:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 07:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 07:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 07:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 07:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 07:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 07:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 07:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 07:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 07:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 07:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 07:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 07:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 07:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 07:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 07:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 07:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 07:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 07:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 07:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 07:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 07:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 07:41:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 07:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 07:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 07:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 07:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 07:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 07:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 07:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 07:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:41:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-31 07:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-31 07:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-31 07:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-31 07:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-31 07:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-31 07:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-31 07:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-31 07:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:41:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:41:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19422 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:41:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:41:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:41:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:41:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:41:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:41:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:41:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:42:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:42:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:42:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:42:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:42:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:42:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:42:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:42:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:42:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:42:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:42:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:42:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:42:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:42:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:42:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:42:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:42:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:42:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:42:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:42:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:42:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:42:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:42:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:42:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:42:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:42:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:42:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:42:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:42:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:42:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:24 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1885 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:42:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:42:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:42:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:42:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:42:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:42:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:42:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:42:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:42:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:42:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:42:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:42:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:42:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:42:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 07:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 07:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 07:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 07:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 07:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 07:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 07:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 07:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 07:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 07:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 07:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 07:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 07:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 07:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 07:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 07:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 07:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 07:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 07:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 07:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 07:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 07:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 07:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 07:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 07:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 07:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 07:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 07:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 07:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 07:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 07:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 07:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 07:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 07:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 07:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 07:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 07:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 07:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 07:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 07:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 07:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 07:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 07:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 07:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 07:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 07:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 07:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 07:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 07:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 07:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 07:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 07:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 07:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 07:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 07:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 07:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 07:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 07:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 07:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 07:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 07:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 07:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 07:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 07:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 07:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 07:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:43:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:43:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 07:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 07:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 07:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 07:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 07:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 07:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 07:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 07:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 07:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 07:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 07:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 07:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 07:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 07:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 07:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 07:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 07:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 07:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 07:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 07:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 07:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 07:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 07:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 07:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 07:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 07:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 07:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 07:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 07:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 07:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 07:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 07:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 07:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 07:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 07:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 07:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:44:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:44:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:44:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:44:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:44:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:44:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:44:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:44:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:44:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:44:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:44:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:44:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:44:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:44:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:44:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:44:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:44:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:44:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:44:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:44:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:44:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:44:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:44:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:44:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:44:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:44:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:44:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:44:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:44:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:44:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:44:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:31 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1000 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:44:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 07:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 07:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:44:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:44:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 07:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 07:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 07:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 07:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 07:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 07:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 07:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 07:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 07:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 07:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 07:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 07:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 07:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 07:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 07:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 07:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 07:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 07:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 07:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 07:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 07:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 07:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 07:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 07:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 07:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 07:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 07:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 07:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 07:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 07:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 07:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 07:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 07:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 07:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 07:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 07:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 07:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 07:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 07:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 07:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 07:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 07:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 07:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 07:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 07:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 07:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 07:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 07:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 07:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 07:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 07:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 07:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 07:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 07:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 07:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 07:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 07:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 07:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 07:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 07:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 07:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 07:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 07:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 07:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 07:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 07:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 07:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 07:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 07:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 07:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 07:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 07:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 07:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 07:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 07:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 07:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 07:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 07:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 07:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 07:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 07:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 07:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 07:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 07:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 07:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 07:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 07:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 07:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 07:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 07:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 07:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 07:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 07:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 07:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 07:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 07:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 07:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 07:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 07:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:45:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:45:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:45:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 07:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 07:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 07:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-31 07:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-31 07:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-31 07:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-31 07:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-31 07:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:45:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:45:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:45:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19109 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19109 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19109 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19109 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19109 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19109 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:45:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19110 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:46:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:46:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:46:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:46:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:46:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:46:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:46:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:46:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:46:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:46:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:46:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:46:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:46:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:46:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:46:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:46:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:46:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:46:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:46:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:46:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:46:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:46:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:46:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:46:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:46:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:46:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:46:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:46:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:46:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:46:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:46:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:46:59 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=4177 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:46:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:47:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:47:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:47:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:47:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:47:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:47:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:47:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:47:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:47:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:47:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:47:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:47:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:47:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:47:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:47:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:47:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:47:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:47:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:47:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:47:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:47:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 07:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 07:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 07:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 07:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 07:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 07:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 07:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 07:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 07:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 07:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 07:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 07:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 07:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 07:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 07:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 07:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 07:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 07:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 07:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 07:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 07:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 07:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 07:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 07:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:47:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:47:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 07:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 07:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 07:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 07:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 07:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 07:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:48:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 07:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:48:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:48:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:48:08 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:08 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:48:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:48:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:48:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:48:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:48:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:48:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:48:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:48:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:48:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:48:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2014 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:48:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:48:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:48:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:48:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:48:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:48:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:48:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:48:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:48:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:48:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:48:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:48:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:48:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:48:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:48:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:48:55 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:48:55 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:48:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:48:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:48:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:48:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:48:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:48:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:48:59 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:48:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:48:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:48:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:48:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:49:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:49:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:49:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:49:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:49:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=480 tn=3 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=590 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:49:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:49:19 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:49:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:49:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:49:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:49:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:49:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:49:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:49:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:49:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:49:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:49:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:49:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:49:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:50:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:50:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:50:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3305 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3305 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3305 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3305 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3305 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:50:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:50:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:50:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:50:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:50:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:50:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:50:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:50:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:50:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:50:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:50:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:19 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:50:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:50:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:50:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:50:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:50:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:50:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:50:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:50:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:50:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:50:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:50:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:50:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:50:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:50:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:50:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:50:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:50:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:50:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:50:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:50:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:50:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:50:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:50:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:50:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:50:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:50:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:50:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:50:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:50:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:50:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:50:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:50:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:50:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:51:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:51:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:51:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:51:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:51:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:51:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:51:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:51:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:51:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:51:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:51:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:51:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:51:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:51:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:51:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:51:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:51:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:51:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:51:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:51:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:51:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:51:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:51:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:51:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:51:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:51:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:51:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:51:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:51:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:51:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:51:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:51:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:51:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:51:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:51:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:51:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:51:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:51:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:51:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:51:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:51:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:51:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:51:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:51:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:51:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:51:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:44 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:51:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:51:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:51:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:51:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:51:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:51:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:51:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:52:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:52:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:52:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:52:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:52:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:52:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:52:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:52:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:52:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:52:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:52:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:52:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:52:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:52:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:52:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:52:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:52:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:52:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:52:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:15 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1848 tn=2 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:15 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1848 tn=3 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:15 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1848 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:52:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:52:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:52:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:52:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3574 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3574 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3574 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3574 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3574 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3574 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:52:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:52:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:52:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:52:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:52:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:52:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:52:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:52:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:52:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:52:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:52:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:52:53 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 07:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 07:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 07:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 07:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 07:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:01 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=7040 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:53:01 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=7040 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:53:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:53:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:53:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:53:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:53:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:53:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:53:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:53:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:53:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:53:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:53:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:53:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:53:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:53:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:53:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 07:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 07:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 07:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 07:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 07:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 07:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 07:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 07:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 07:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 07:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 07:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 07:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 07:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 07:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 07:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 07:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 07:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 07:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 07:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 07:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 07:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 07:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 07:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 07:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 07:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 07:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 07:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 07:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 07:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 07:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 07:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 07:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 07:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 07:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 07:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 07:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 07:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 07:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 07:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 07:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 07:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 07:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 07:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 07:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 07:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 07:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 07:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 07:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 07:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 07:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 07:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 07:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:53:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:53:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:53:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:53:55 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 07:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 07:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 07:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 07:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 07:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 07:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 07:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 07:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 07:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 07:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 07:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 07:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 07:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 07:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 07:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 07:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:54:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:54:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:54:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 07:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 07:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 07:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 07:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 07:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 07:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 07:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 07:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 07:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 07:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 07:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 07:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 07:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 07:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 07:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 07:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:54:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:54:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=13934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:54:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:54:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:54:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:54:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:54:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:54:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:54:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:54:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:54:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:54:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:54:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:54:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:54:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:54:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:54:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:54:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:54:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:54:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:54:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3570 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:54:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:54:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:54:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:54:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:54:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:54:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:54:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:54:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:54:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:54:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:54:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:54:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:54:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:54:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:54:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:54:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:54:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:54:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:54:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:54:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:54:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:54:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:54:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:54:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:54:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:54:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:54:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:54:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:54:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:54:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:54:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:54:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:54:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:54:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:54:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:55:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:55:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:55:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:55:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:55:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:55:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:55:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:55:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:55:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:55:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:55:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:55:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:55:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:55:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:55:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:55:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:55:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:55:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:55:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:55:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:55:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:55:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:55:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:55:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:55:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:55:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:55:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:55:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:55:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:55:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:55:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:55:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:55:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:55:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:55:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:55:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:55:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:55:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:55:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:55:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:55:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:55:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:55:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:55:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:55:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:55:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:55:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:55:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:55:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:56:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:56:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:56:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:56:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:56:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:56:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:56:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:56:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:56:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:56:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:56:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:56:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:56:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:56:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:56:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:56:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:56:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:56:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:56:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:56:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:56:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:56:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:56:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:56:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:56:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:56:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:56:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:56:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:56:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:56:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:56:50 [DEBUG] fake_trx.py:263 (MS@172.18.201.22:6700) Recv SETTA cmd
2024-10-31 07:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:56:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:56:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:56:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:56:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:57:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:57:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:57:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:57:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:57:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:57:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:57:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:57:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:57:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:57:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:57:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:57:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:57:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:57:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:57:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:57:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:57:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:57:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:57:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:57:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:57:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:57:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:57:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:57:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:57:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:57:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:57:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:57:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:58:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:58:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:58:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:58:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:58:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:58:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:58:12 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:58:12 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:58:12 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:58:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:58:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:58:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:58:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:58:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:58:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:58:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:58:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:58:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:58:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:58:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:58:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:58:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:58:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:58:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:58:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:58:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:58:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:58:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:59:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:59:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:59:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:59:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:59:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:59:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:59:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:59:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:59:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:59:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:59:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:59:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:59:13 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:59:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:59:13 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:59:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:59:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 07:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 07:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 07:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 07:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 07:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:59:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:59:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 07:59:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4716 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:59:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:59:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4716 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4716 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4716 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4716 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4716 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:59:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:59:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:59:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:59:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 07:59:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 07:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 07:59:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 07:59:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 07:59:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 07:59:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 07:59:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 07:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 07:59:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 07:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 07:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 07:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 07:59:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 07:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 07:59:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 07:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 07:59:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 07:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 07:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 07:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 07:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 07:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 07:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 07:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 07:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 07:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 07:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 07:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 07:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 07:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 07:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 07:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 07:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 07:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 07:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 07:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 07:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 07:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 07:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 07:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 07:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 07:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 07:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 07:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 07:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 07:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 07:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 07:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 07:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 07:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 07:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:00:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:00:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:00:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:00:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:00:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4719 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4719 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4719 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4719 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4719 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4719 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:00:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:00:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:00:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:00:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:00:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:00:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:00:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:00:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:00:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:00:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:00:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:00:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:00:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:00:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:00:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:00:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:00:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:00:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:00:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:00:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:00:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:00:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:00:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:00:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:00:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:00:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:00:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:00:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:00:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:01:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:01:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:01:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:01:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:01:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:01:19 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:01:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:01:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:01:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:01:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:01:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:01:25 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:01:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:01:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:01:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:01:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:01:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=112 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:01:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:01:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:01:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:01:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:01:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:01:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:01:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:01:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:01:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:01:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:01:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:01:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:01:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:01:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:01:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:01:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:01:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:01:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:01:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:01:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:01:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:01:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:01:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:01:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:01:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:01:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:01:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:01:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:01:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:01:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:02:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:02:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:02:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:02:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:02:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:02:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:02:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:02:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:02:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:02:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:02:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:02:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:02:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:02:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:02:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:02:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:02:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:02:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:02:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:02:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:02:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:02:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:02:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:02:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:02:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:02:44 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:02:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:02:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:02:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:02:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:02:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:03:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:03:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:03:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:03:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:03:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:03:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:03:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:03:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:03:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:03:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:03:19 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:03:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:03:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:03:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:03:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3544 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3544 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:03:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:03:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:03:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:03:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:03:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:03:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:03:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:03:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:03:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:03:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:03:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:03:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:03:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:03:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:03:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:03:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:03:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:03:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:03:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:03:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:03:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:03:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:03:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:03:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:03:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:03:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:03:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:03:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:03:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:04:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:04:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:04:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:04:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:04:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:04:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:04:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:04:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:04:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:04:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:04:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:04:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:04:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:04:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:04:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:04:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:04:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:04:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:04:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:04:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:04:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:04:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:04:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:04:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:04:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:04:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:04:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:04:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:04:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:04:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:04:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:04:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:04:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:05:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:05:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:05:02 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:05:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:05:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:05:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:05:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:05:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:05:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:05:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:05:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:05:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:05:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:05:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:05:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:05:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:05:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:05:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:05:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:05:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:05:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:05:25 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:05:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:05:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:05:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:05:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:05:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:05:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:05:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:05:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:05:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:05:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:05:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:05:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:05:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:05:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:05:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:05:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:05:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:05:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:05:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:05:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:05:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:05:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:00 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:06:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:06:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:06:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:06:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:06:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:06:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:06:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:06:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:06:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:06:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:06:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:06:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:06:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:06:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:06:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:06:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:06:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:06:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:06:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:06:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:07:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:07:02 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:07:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:07:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:07:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:07:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:07:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:07:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:07:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:07:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:07:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:07:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:07:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:07:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:07:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:07:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:07:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:07:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:07:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:07:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:07:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:07:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:07:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:07:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:07:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1341 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:07:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:07:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:07:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:07:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:07:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:07:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:07:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:07:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:07:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:07:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:07:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:07:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:07:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:07:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:07:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:07:55 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:07:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:07:55 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:07:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:07:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:07:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:07:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:08:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:08:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:08:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:08:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:08:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:08:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:08:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:08:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:08:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:08:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:08:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:08:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:08:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:08:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:08:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:08:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:08:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:08:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:08:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:08:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:08:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:08:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:08:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:08:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:08:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:08:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:08:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:08:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:08:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=889 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=889 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=889 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=889 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=889 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=889 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:08:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:08:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:08:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:08:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=152 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:08:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:08:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:08:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:08:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:08:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:08:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:08:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:08:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:08:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:08:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:08:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:08:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:08:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:08:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:04 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:04 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:04 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:09:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:09:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:09:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:09:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:09:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:09:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:09:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:09:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:09:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:48 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:09:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:09:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:09:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:09:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:09:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:09:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:09:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:09:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:09:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:09:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:09:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:09:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:09:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:09:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:09:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:10:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:10:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:10:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:10:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:10:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=544 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=544 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:10:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:10:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:10:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:10:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:10:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:10:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:10:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:10:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:10:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:10:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:10:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:10:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:11:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:12 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:12 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:12 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=111 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=111 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=111 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=111 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=111 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=111 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:23 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:23 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:34 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:34 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:11:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:11:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:11:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:11:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:11:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:11:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:11:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:11:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:11:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:11:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:11:56 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:11:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:11:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:11:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:12:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:12:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:12:02 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:12:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:12:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:12:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:12:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:12:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:12:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:12:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:12:07 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 08:12:07 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 200
2024-10-31 08:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:12:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:09 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 08:12:09 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 0
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:12:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:12:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:12:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:12:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:12:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:15 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 08:12:15 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 200
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 08:12:16 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 0
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:12:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:12:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:12:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:12:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:12:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:12:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:12:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:12:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:12:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:12:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:12:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:12:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:12:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:12:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:12:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:12:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:12:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:12:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:12:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:12:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:12:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:12:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:12:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:04 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=6821 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:13:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:13:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:13:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:13:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:13:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:13:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:13:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:13:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:13:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:13:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:13:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:13:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:13:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:13:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:13:42 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:13:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:13:42 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:13:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:13:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:13:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:13:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:13:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:13:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:13:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:13:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:13:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:13:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:13:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:13:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:13:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:14:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:14:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:14:02 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:14:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:14:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:14:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:14:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:14:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:14:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:14:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:14:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:14:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:14:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:14:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:14:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:14:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:14:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:14:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:14:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:14:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:14:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:14:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:14:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:14:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:14:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:14:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:14:57 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:14:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:14:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:14:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:14:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:15:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:23 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:23 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:15:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:15:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:15:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:15:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:15:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:15:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:15:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:15:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:15:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:15:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:15:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:15:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:15:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:16:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:16:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:16:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:16:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:16:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:16:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:16:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:16:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:16:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:16:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:29 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:16:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:16:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:16:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:16:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:16:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:16:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:16:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:16:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:16:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:16:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:16:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:16:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:16:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:16:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:16:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:17:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:17:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:17:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:17:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:17:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:17:02 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:17:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:17:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:17:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:17:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:17:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:17:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:17:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:17:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:17:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:17:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:17:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:17:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:17:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:17:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:17:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:17:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:17:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:17:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:17:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:17:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:17:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:17:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:17:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:17:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:17:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:17:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:17:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:17:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:17:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:17:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:17:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:17:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:17:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:17:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:17:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:18:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:18:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:18:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:18:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:18:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:18:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:18:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:18:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:18:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:18:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:18:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:18:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:18:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:18:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:18:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:18:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:18:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:18:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:18:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:18:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:18:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:18:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:25 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:18:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:18:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:18:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:18:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:18:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:18:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:18:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:18:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:18:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:18:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:18:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:18:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:18:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:18:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:18:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:18:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:18:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:18:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:18:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:18:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:18:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:18:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:18:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:18:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:18:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:18:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:18:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:18:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:18:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:18:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:18:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:18:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:18:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:18:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:18:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:18:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:18:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:18:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:18:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:18:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:18:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:18:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:18:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:18:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:18:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:18:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:18:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:18:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:18:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:18:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:18:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:18:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:18:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:18:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:18:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:18:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:18:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:19:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:19:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:19:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:19:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:19:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:19:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:19:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:03 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=3589 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:19:04 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:19:04 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:19:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:19:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:19:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:19:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:19:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:19:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:19:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:19:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:19:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:19:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:19:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:19:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:19:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:19:12 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:19:12 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:19:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:19:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:19:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:19:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:19:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:19:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:19:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:19:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:19:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:19:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:19:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:19:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:19:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6821 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:19:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:19:23 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:19:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:23 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:19:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:19:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:19:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:19:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:19:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:19:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:19:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:19:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:19:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:19:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:19:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:19:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:19:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:19:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:19:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:19:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:19:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:19:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:19:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:19:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:20:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:20:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:20:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=598 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:23 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:23 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:29 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:42 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:42 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:20:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:20:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:20:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:20:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:20:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:20:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:20:55 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:20:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:55 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:20:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:20:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:20:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:20:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:21:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:21:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:21:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:21:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:21:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:21:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:21:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:21:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:21:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:21:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:21:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:21:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:21:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:21:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:21:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:21:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:21:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:21:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:21:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:21:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:21:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:21:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:21:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:21:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:21:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:21:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:21:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:21:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:21:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:21:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:21:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:21:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:21:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:21:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:21:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:21:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:22:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:22:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:22:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:22:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:22:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:22:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:22:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:22:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:22:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:22:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:22:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:22:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:22:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:22:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:22:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:22:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:22:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2277 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2277 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2277 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2277 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2277 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:22:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:22:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:22:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:22:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:22:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:22:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:22:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:22:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:22:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:22:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:22:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:22:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:22:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:22:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:22:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:22:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:22:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:22:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:22:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:22:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:22:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:22:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:22:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:22:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:22:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:23:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:23:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:23:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:23:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:23:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:23:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:23:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:23:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:23:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:23:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:23:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:23:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:23:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:23:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:23:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:23:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:23:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:23:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:23:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:23:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:23:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:23:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:23:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:23:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:43 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:23:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:23:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:23:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:23:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:23:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:23:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:23:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:23:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:23:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:23:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:23:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:23:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:23:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:23:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:23:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:24:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:24:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:24:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:24:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:24:13 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:24:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:24:13 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:24:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:24:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:24:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:24:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:24:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:24:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:24:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:24:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:24:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:24:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:24:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:24:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:24:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:24:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:24:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:24:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:24:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:24:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:24:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:24:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:24:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:24:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:24:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:24:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:24:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:24:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:24:56 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:24:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:24:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:25:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:25:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:25:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:25:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:25:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:25:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:25:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:25:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:25:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:25:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:25:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:25:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:25:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:25:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:25:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:25:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:25:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:25:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:25:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:25:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:25:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:25:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:25:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4386 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4386 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4386 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4386 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4386 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4386 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:25:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:26:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:26:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:26:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:26:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:26:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:26:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:26:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:26:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:26:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:26:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:26:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:26:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:26:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:26:29 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:26:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:26:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:26:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:26:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:26:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:26:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:26:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:26:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:26:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:26:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:26:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:26:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:26:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:26:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:27:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:27:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:27:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:27:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:27:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:27:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:27:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:27:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:27:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:27:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:27:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:27:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:27:29 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:27:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1829 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:27:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:27:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:27:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:27:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:27:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:27:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:27:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:27:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:27:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:27:48 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:27:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:27:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:27:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:27:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:27:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:27:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:27:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:28:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:28:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:28:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:28:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:28:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:28:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:28:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:28:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:28:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:28:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:28:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:28:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:28:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:28:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:28:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:28:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:28:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:28:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:28:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:28:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:28:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:28:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:28:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:28:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:28:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:28:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:28:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:28:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:28:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:28:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:28:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:28:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:28:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:29:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:29:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:29:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:29:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:29:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:29:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:29:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:29:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:29:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:29:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:29:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:29:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:29:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2479 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2479 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2479 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2479 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:29:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:29:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:29:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:29:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:29:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:29:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:29:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2266 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:29:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:29:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:29:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:29:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:29:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:29:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:29:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:29:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:29:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:29:53 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:29:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:29:53 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:29:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:29:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:29:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2682 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:30:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:30:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:30:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:30:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:30:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:30:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:30:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:30:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:30:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:30:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:30:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:30:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:30:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:30:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:30:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3332 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3332 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3332 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3332 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3332 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3333 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:30:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:30:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:30:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:30:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:30:48 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:30:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:30:53 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:30:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:53 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:30:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:30:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:30:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:30:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:30:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:30:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:30:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:31:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:31:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:31:00 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:31:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:31:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:31:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:31:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:31:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:31:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:31:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:31:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:31:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:31:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:31:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:31:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:31:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:31:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:31:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:31:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:31:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:31:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:31:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:31:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:31:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:31:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:31:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:31:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:31:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:31:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:31:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:31:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:31:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:31:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:31:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:31:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:31:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:31:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:31:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:31:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:31:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:32:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:32:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:32:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4504 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:32:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4504 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:32:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4504 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:32:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4504 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:32:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4504 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:32:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4504 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:32:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:32:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:32:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:32:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:32:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:32:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:32:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:32:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:32:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:32:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:32:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:32:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:32:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:32:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:32:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:32:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:32:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:32:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:32:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:32:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:32:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:32:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:32:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:32:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:32:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:32:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:32:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:32:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:32:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:32:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:32:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:32:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:32:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:33:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:33:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 08:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 08:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 08:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 08:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 08:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 08:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 08:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 08:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 08:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 08:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 08:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 08:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 08:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 08:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 08:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 08:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 08:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 08:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 08:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 08:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 08:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 08:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 08:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 08:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 08:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 08:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 08:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:33:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 08:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 08:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 08:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 08:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 08:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 08:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 08:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 08:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 08:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 08:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 08:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 08:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 08:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 08:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 08:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 08:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 08:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 08:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 08:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 08:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 08:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 08:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 08:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 08:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 08:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 08:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 08:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 08:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 08:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 08:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 08:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 08:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 08:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 08:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 08:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 08:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 08:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 08:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 08:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 08:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 08:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 08:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:34:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:34:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:34:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:34:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:34:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:34:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:34:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:34:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:34:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:34:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:34:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:34:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:34:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:34:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:34:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:34:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:34:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:34:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3797 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3798 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:34:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:34:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:34:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:34:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:34:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:34:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:34:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:44 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:34:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:34:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:34:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:34:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:34:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:34:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:34:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:35:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:35:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:35:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:35:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:35:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:35:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:35:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:35:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:35:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:35:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2996 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2996 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2996 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2996 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2996 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:35:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:35:34 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:35:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:34 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:35:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:35:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:35:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:35:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:35:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:35:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:35:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:35:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:35:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:35:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:35:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:35:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:35:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:35:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2730 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:36:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:36:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:36:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:36:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:36:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:36:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:36:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:36:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:36:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:36:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:36:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:36:04 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:36:04 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:36:04 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:36:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:36:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:36:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:36:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:06 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:36:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:36:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:36:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:36:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:36:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:36:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:36:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:36:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:36:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:36:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:36:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:36:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:36:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 08:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 08:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 08:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 08:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 08:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 08:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 08:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 08:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 08:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 08:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 08:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 08:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 08:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 08:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 08:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 08:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 08:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 08:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 08:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 08:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 08:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 08:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 08:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 08:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 08:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 08:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 08:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 08:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 08:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 08:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 08:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 08:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 08:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 08:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 08:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 08:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 08:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 08:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 08:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 08:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:37:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:37:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:37:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:37:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 08:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 08:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 08:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 08:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 08:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 08:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 08:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 08:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 08:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 08:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 08:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 08:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 08:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 08:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 08:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 08:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 08:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 08:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 08:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 08:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 08:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 08:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 08:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 08:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 08:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 08:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 08:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 08:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 08:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 08:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 08:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 08:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 08:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 08:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 08:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 08:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 08:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 08:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 08:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 08:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-31 08:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-31 08:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-31 08:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-31 08:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-31 08:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-31 08:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-31 08:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-31 08:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-31 08:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-31 08:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-31 08:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-31 08:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-31 08:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-31 08:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-31 08:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-31 08:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-31 08:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-31 08:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-31 08:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-31 08:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-31 08:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-31 08:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-31 08:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-31 08:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-31 08:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-31 08:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-31 08:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-31 08:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-31 08:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-31 08:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-31 08:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-31 08:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-31 08:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-31 08:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:37:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-31 08:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-31 08:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-31 08:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-31 08:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-31 08:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-31 08:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-31 08:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-31 08:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-31 08:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-31 08:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-31 08:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-31 08:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-31 08:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-31 08:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-31 08:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-31 08:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-31 08:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-31 08:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-31 08:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-31 08:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-31 08:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-31 08:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-31 08:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-31 08:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-31 08:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-31 08:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-31 08:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-31 08:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-31 08:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-31 08:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-31 08:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-31 08:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-31 08:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-31 08:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-31 08:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 25704
2024-10-31 08:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 25806
2024-10-31 08:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 25908
2024-10-31 08:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 26010
2024-10-31 08:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 26112
2024-10-31 08:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 26214
2024-10-31 08:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 26316
2024-10-31 08:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 26418
2024-10-31 08:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 26520
2024-10-31 08:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 26622
2024-10-31 08:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 26724
2024-10-31 08:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 26826
2024-10-31 08:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 26928
2024-10-31 08:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 27030
2024-10-31 08:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 27132
2024-10-31 08:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 27234
2024-10-31 08:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 27336
2024-10-31 08:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 27438
2024-10-31 08:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 27540
2024-10-31 08:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 27642
2024-10-31 08:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 27744
2024-10-31 08:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 27846
2024-10-31 08:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 27948
2024-10-31 08:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 28050
2024-10-31 08:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 28152
2024-10-31 08:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 28254
2024-10-31 08:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 28356
2024-10-31 08:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 28458
2024-10-31 08:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 28560
2024-10-31 08:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 28662
2024-10-31 08:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 28764
2024-10-31 08:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 28866
2024-10-31 08:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 28968
2024-10-31 08:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 29070
2024-10-31 08:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 29172
2024-10-31 08:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 29274
2024-10-31 08:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 29376
2024-10-31 08:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 29478
2024-10-31 08:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 29580
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:38:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:38:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:38:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:38:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:38:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:38:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:38:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:38:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:38:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:38:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:38:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:38:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:38:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:38:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:38:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:38:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:38:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:38:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:38:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:38:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:38:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:38:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:38:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:38:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:38:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:38:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:38:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:38:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:38:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:38:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:38:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:38:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:38:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:38:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:38:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:38:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:38:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:38:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:56 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:38:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:38:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:38:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:39:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:39:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:39:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 08:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 08:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 08:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 08:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 08:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 08:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 08:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 08:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 08:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 08:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 08:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 08:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 08:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 08:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 08:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 08:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 08:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 08:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 08:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 08:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 08:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 08:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 08:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 08:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 08:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:39:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:39:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:39:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:39:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:40:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:40:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:40:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:40:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:40:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:40:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:40:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:40:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:40:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:40:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:40:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:40:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:40:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:40:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:40:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:40:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7551 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:40:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7551 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:40:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7551 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:40:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7551 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:40:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7551 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:40:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:40:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:40:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:40:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:40:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:40:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:40:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:40:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:40:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:40:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:40:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:40:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:40:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:40:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:40:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:40:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:40:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:40:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:40:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:40:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:40:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:40:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:41:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:41:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:41:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:41:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:41:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:41:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:41:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:41:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:41:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:41:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:41:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:41:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:41:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:41:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:41:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:41:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:41:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:41:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:41:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:41:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:41:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:41:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:41:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:41:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:41:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:41:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:41:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:41:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4613 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4613 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4613 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4613 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4613 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:39 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4613 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:41:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:41:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:41:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:41:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:41:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:41:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:41:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:44 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:41:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:41:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:41:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:41:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:41:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3032 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:41:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3032 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3032 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:41:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:04 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:04 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:04 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:17 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:42:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:42:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:42:57 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:42:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:42:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:42:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:20 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:20 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:20 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:43:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:43:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:35 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:43:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:43:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:43:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:43:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:43:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:43:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:43:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:43:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:43:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:02 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:02 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:44:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:44:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:44:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:44:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:44:08 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:44:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:44:08 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:44:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:44:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:44:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:44:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:44:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:44:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:44:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:44:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:44:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:44:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:44:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:44:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:44:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:44:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:44:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:44:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:44:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:44:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:44:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:44:27 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.201.20:5700'
2024-10-31 08:44:27 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.201.20:5802)
2024-10-31 08:44:27 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.201.20:5801)
2024-10-31 08:44:27 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.201.22:6700'
2024-10-31 08:44:27 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.201.22:6802)
2024-10-31 08:44:27 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.201.22:6801)
2024-10-31 08:44:27 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.201.20:5700/1'
2024-10-31 08:44:27 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.201.20:5804)
2024-10-31 08:44:27 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.201.20:5803)
2024-10-31 08:44:27 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.201.20:5700/2'
2024-10-31 08:44:27 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.201.20:5806)
2024-10-31 08:44:27 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.201.20:5805)
2024-10-31 08:44:27 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.201.20:5700/3'
2024-10-31 08:44:27 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.201.20:5808)
2024-10-31 08:44:27 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.201.20:5807)
2024-10-31 08:44:27 [INFO] fake_trx.py:423 Init complete
2024-10-31 08:44:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:44:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:44:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:45:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:45:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:45:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:45:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:45:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 0 -> 1
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:45:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 0 -> 1
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:45:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 0 -> 1
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:45:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 0 -> 1
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:45:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:45:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:45:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:45:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:06 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.201.20:5700'
2024-10-31 08:46:06 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.201.20:5802)
2024-10-31 08:46:06 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.201.20:5801)
2024-10-31 08:46:06 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.201.22:6700'
2024-10-31 08:46:06 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.201.22:6802)
2024-10-31 08:46:06 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.201.22:6801)
2024-10-31 08:46:06 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.201.20:5700/1'
2024-10-31 08:46:06 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.201.20:5804)
2024-10-31 08:46:06 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.201.20:5803)
2024-10-31 08:46:06 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.201.20:5700/2'
2024-10-31 08:46:06 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.201.20:5806)
2024-10-31 08:46:06 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.201.20:5805)
2024-10-31 08:46:06 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.201.20:5700/3'
2024-10-31 08:46:06 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.201.20:5808)
2024-10-31 08:46:06 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.201.20:5807)
2024-10-31 08:46:06 [INFO] fake_trx.py:423 Init complete
2024-10-31 08:46:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 0 -> 1
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 0 -> 1
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 0 -> 1
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 0 -> 1
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:46:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:46:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:12 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:46:12 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:46:12 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:15 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:20 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:22 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:22 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:22 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:22 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:24 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:24 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:46:24 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:24 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:46:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:46:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:46:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:46:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:46:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:46:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
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2024-10-31 08:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:46:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
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2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
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2024-10-31 08:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
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2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=460 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:46:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:46:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:46:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:46:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:46:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:46:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:46:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:46:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:46:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:46:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:48 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:46:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:46:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:46:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:58 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1006 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:46:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:46:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:46:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:46:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:26 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:47:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:40 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:47:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 08:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 08:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 08:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 08:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 08:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 08:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 08:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 08:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 08:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 08:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 08:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 08:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 08:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 08:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 08:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:50 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:50 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 08:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 08:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 08:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 08:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 08:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 08:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 08:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:54 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 08:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 08:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 08:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 08:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 08:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 08:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 08:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 08:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:58 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:47:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:47:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:47:58 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 08:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 08:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 08:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 08:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 08:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 08:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 08:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 08:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:02 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:02 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 08:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 08:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 08:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 08:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 08:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 08:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 08:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:07 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 08:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 08:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 08:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 08:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 08:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 08:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 08:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 08:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:11 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:11 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 08:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 08:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 08:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 08:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 08:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 08:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 08:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 08:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:15 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 08:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 08:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 08:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 08:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 08:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 08:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 08:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 08:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:20 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:20 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-31 08:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-31 08:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-31 08:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-31 08:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-31 08:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-31 08:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-31 08:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-31 08:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:24 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:48:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:48:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19418 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19418 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19418 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19418 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19418 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19418 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=19419 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:48:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:48:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:48:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:48:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:48:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:48:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:48:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:48:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:48:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:48:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:48:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:48:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:48:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:48:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:48:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:48:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:48:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:48:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:48:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:48:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:48:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:37 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:37 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:37 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:38 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:40 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:40 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:40 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:41 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:41 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:42 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:42 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:42 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:42 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:43 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:43 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:43 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:43 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:43 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:44 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:44 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:48:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:48:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:48:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:48:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:48:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:48:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:48:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:48:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:48:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:48:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:48:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:48:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:48:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:48:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:48:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:48:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:57 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:58 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:48:58 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:59 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:48:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:48:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:48:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:04 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:06 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:06 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:07 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:49:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:09 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:09 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:10 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:12 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:12 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:13 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:13 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:14 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:14 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:19 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:49:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:49:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:49:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:49:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:49:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:49:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:49:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:49:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:49:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:49:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:49:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:49:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:49:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:49:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:50 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:49:50 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:49:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:12 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:12 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 08:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 08:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 08:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 08:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 08:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 08:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 08:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 08:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 08:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 08:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 08:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 08:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 08:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 08:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 08:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 08:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:20 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:20 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 08:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 08:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 08:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 08:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 08:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 08:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 08:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 08:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 08:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 08:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 08:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 08:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 08:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 08:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 08:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 08:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:29 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 08:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 08:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 08:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 08:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 08:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 08:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 08:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 08:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:33 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:33 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 08:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 08:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 08:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 08:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 08:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 08:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 08:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:37 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:37 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=15795 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:37 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=15795 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:37 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 08:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 08:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 08:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 08:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 08:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 08:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 08:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 08:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:42 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:42 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 08:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 08:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 08:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 08:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 08:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 08:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 08:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:46 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:50:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:50:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 08:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 08:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 08:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 08:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 08:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 08:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 08:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:50:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:50:50 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:50:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:50:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:50:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=18563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:50:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:50:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:50:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:50:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:50:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:50:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:50:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:50:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:51:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:51:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:51:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:51:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:51:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:51:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:51:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:51:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:51:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:51:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:51:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:51:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:51:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:51:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:51:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:51:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:09 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=1922 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:51:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:27 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:51:27 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:32 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:51:47 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:51:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 08:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 08:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 08:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 08:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 08:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 08:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:51 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:51:51 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 08:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 08:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 08:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 08:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 08:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 08:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 08:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 08:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:56 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:51:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:51:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:51:56 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 08:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 08:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 08:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 08:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 08:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 08:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 08:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:00 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 08:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 08:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 08:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 08:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 08:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 08:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 08:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 08:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:04 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:04 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 08:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 08:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 08:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 08:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 08:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 08:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 08:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 08:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 08:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 08:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 08:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 08:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 08:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 08:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 08:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 08:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:13 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:13 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 08:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 08:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 08:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 08:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 08:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 08:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 08:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 08:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 08:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 08:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 08:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 08:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 08:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 08:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 08:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 08:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 08:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 08:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 08:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 08:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 08:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 08:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 08:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 08:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 08:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:26 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:26 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 08:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-31 08:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-31 08:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-31 08:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-31 08:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-31 08:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-31 08:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-31 08:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:30 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:52:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:52:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:52:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:52:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:52:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:52:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:52:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:52:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:52:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:52:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:52:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:52:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:52:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:52:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:52:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:52:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:52:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:52:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:52:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:52:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:52:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:52:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:47 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:48 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:48 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:50 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:54 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:55 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:55 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:56 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:56 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:58 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:58 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:59 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:52:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:52:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:52:59 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:01 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:02 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:02 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:03 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:03 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:05 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:05 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:06 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:06 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:53:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:53:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:53:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:53:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:53:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:53:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:53:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:53:13 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:53:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:53:13 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:53:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:53:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:53:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:53:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:28 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:35 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:39 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:53:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:42 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:53:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:53:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:53:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:42 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:53:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:53:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:53:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:53:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:53:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:53:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:53:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:53:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:53:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:53:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:53:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:53:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:53:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:53:48 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:53:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:53:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:53:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:52 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:52 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=936 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:53:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:53:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:53:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:53:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:54:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:04 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:04 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:54:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:54:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:12 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:12 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:54:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:13 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:54:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:20 [WARNING] transceiver.py:250 (MS@172.18.201.22:6700) RX TRXD message (fn=6931 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 08:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 08:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 08:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 08:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 08:54:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:24 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 08:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 08:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 08:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 08:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 08:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 08:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:28 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:28 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 08:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 08:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 08:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 08:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 08:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 08:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:31 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:31 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 08:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 08:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 08:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 08:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 08:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 08:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:54:34 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 08:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:35 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:54:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:54:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:54:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:54:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:54:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:54:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:54:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:54:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:54:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:54:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:54:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:54:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:54:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:54:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:54:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:54:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:54:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:54:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:54:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:54:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:54:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:54:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:54:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:54:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:54:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:54:55 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:54:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:54:55 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:54:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:54:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:54:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:54:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:54:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:54:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:55:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2027 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2027 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2027 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2027 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2027 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2027 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:55:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:55:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:55:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:55:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:55:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:55:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:55:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:55:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2882 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2882 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2882 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2882 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2882 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2883 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2884 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:55:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:55:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:55:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:55:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:55:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:55:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:55:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:55:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:55:34 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:55:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2204 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2205 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:55:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:55:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:55:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:55:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:47 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=812 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:55:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:55:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:55:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:55:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:55:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:55:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:55:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:55:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:56:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:56:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:56:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:56:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:56:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:56:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:56:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:56:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:56:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:56:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:56:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:56:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:56:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:56:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:56:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1189 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1190 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:56:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:56:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:56:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:56:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:56:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:56:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:56:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:56:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:56:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:56:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:56:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:56:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:56:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:56:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:56:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:56:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:56:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:56:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:56:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:56:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:56:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:56:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:56:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:57:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:57:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:57:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:57:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:57:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:57:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:57:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:57:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:57:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:19 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:57:19 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:20 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:57:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:57:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:57:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:57:26 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:27 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:57:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:57:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:57:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:57:33 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=355 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=356 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:57:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:57:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:57:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:57:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:57:48 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 08:57:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:49 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:57:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:57:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:57:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:57:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:57:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:57:54 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:57:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:57:55 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:57:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:57:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:57:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:58:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:58:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:58:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:58:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:58:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:58:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 08:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 08:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 08:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 08:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 08:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 08:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 08:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 08:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 08:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 08:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 08:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:17 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 08:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 08:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 08:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 08:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 08:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 08:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 08:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 08:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 08:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 08:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 08:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 08:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 08:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 08:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 08:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 08:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 08:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 08:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 08:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 08:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 08:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 08:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 08:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 08:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 08:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 08:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 08:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 08:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 08:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 08:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 08:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 08:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:58:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:58:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:58:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:58:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:58:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:58:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:58:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:58:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:58:47 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:48 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:58:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:58:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:58:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:58:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:58:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:58:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:58:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:58:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:58:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:58:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:58:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:58:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:58:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:58:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:59:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:59:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:59:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:59:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 08:59:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:59:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:59:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:59:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:59:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:59:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:59:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:59:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:15 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:59:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:59:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:59:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:59:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:59:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:59:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:59:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:59:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:59:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:59:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:59:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:59:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:59:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:59:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:59:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:59:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 08:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:59:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 08:59:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 08:59:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 08:59:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 08:59:48 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 08:59:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 08:59:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 08:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 08:59:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 08:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 08:59:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 08:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 08:59:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 08:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 08:59:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 08:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 08:59:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 08:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 08:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 08:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 08:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 08:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 08:59:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 08:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 08:59:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 08:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 08:59:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 08:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 08:59:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 08:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 08:59:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 08:59:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 08:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 08:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 08:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:00:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:00:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:00:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:00:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:00:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:00:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4430 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:00:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:00:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:00:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:00:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:00:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:00:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=117 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=120 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=123 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:14 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:15 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:15 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:00:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:00:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:00:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:00:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:00:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:22 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:00:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:00:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:00:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:00:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:00:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:00:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:00:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:00:34 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:34 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:00:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:00:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:00:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:00:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:00:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2363 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2363 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2363 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2363 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2363 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2363 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:00:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:00:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:00:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:00:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:00:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:00:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:00:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:00:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:00:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:00:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:00:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:00:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:00:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:00:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:00:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:00:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:01:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:01:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:01:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:01:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:01:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:01:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:01:07 [DEBUG] fake_trx.py:263 (MS@172.18.201.22:6700) Recv SETTA cmd
2024-10-31 09:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:01:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:01:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:01:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:01:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:01:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:01:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:01:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:01:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:01:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:01:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:01:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:01:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:01:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:01:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:01:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:01:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:01:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:01:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:01:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:01:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:01:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:01:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:01:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:01:59 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:01:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:59 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:01:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:01:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:02:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:02:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2274 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2274 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:02:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:02:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:02:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:02:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:02:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:02:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:17 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:02:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:02:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:02:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:02:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:02:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:02:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:02:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:02:32 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:35 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:02:38 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2876 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2876 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2876 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2876 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2876 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2877 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:02:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:02:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:02:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:02:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:02:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:02:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:02:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:02:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:02:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:02:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:02:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:02:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:02:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:02:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:02:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:02:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:02:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:02:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:03:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:03:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:03:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:03:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:03:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:03:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:03:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:03:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:03:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:03:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:03:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:03:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:03:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:03:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:03:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:03:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:03:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:03:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:03:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:03:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:03:09 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:03:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:03:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:03:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:03:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:03:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:03:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:03:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:03:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:03:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:03:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:03:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:03:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:03:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:03:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:03:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:03:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:03:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:03:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:03:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:03:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:03:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:03:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:03:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:03:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:03:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:04:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:04:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:04:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:04:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:04:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:04:04 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:04:04 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:04:04 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:04:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:04:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:04:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:04:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:04:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:04:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:04:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:04:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:04:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4728 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:04:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:04:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:04:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:04:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:04:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:04:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:04:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:04:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:04:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:04:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:04:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:04:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:04:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:04:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:04:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:04:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:04:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:05:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:05:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:05:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:05:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:05:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:05:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:05:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:05:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:05:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:05:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:05:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:05:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:05:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5999 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5999 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6000 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:05:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:05:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:05:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:05:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:05:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:05:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:05:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:05:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:05:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:05:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:05:54 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:05:54 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:05:54 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:05:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:05:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:05:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:05:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:06:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:06:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:06:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:06:00 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:06:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:06:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:06:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:06:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:06:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:06:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:06:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:06:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:06:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:06:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:06:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:06:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:06:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:06:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:06:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:06:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:06:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:06:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:06:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:06:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:06:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:06:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:06:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:49 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:06:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:06:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:06:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:06:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:06:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:06:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:06:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:06:55 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:06:55 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:06:55 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:06:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:06:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:06:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:06:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:06:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:06:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:06:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:07:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:07:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:07:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:07:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:07:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:07:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:07:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:07:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:07:08 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:07:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:07:08 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:07:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:07:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:07:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:07:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:07:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:07:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:07:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:07:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:07:21 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:07:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:07:22 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:07:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:07:23 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:07:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:07:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:07:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:07:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:07:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:07:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:07:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:07:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:07:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:07:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:07:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:07:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:07:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:07:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:07:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:07:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:07:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:07:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:07:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:07:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:07:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:07:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:07:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:07:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:07:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:07:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:07:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:07:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:07:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:07:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:07:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:07:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:07:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:07:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:07:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:07:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:07:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:07:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:07:59 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3557 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:07:59 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3557 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:05 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:08:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:08:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:08:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:08:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:08:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:08:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:08:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:08:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:08:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:08:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:08:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:08:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:08:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:08:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:08:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:08:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:08:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:08:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:08:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:08:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:08:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:09:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=7310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:09:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:09:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:09:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:09:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:09:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:09:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:09:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=762 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:09:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:09:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:09:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:09:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:09:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:09:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:09:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:09:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:09:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:09:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:09:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:09:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:09:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:09:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:09:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:09:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:09:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:09:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:09:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:09:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:09:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:09:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:09:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:09:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:09:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:09:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:09:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:09:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:09:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:09:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:09:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:09:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:10:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:10:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:10:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:10:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:10:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:10:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:10:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=979 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=979 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=979 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=979 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=979 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=979 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:10:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:10:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:10:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:10:44 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:44 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:10:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:10:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:10:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:10:53 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:10:53 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:10:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:10:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:10:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:10:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:10:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:10:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:10:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:10:59 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:10:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:10:59 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:10:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:10:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:11:02 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:11:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:07 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:11:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:11:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:11:13 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:11:13 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:11:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:11:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:11:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:11:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:11:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:11:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:11:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:11:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:11:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:11:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:11:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:11:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:11:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:11:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:11:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:11:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:11:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:11:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:11:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:11:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:11:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:11:40 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:11:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:11:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:11:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:11:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:11:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:11:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:11:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:11:54 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:11:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:11:56 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:11:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:11:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:11:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:11:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1187 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=781 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=781 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=781 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:04 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:12:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:12:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:12:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:12:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:12:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:13 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:19 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:19 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:12:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:12:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:12:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:12:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:12:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:12:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:12:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:12:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:12:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:12:59 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:12:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:12:59 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:12:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:12:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:13:02 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-31 09:13:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:13:03 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:13:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:13:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:13:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:13:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:13:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=145 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=145 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=145 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=145 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=145 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=145 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:13:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:13:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:13:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:13:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:13:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:13:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:13:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:13:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:13:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:13:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:13:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:13:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:13:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:13:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:13:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:13:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:13:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:13:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:13:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:13:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:13:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:13:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:13:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:13:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=764 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:13:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:13:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:13:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:13:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:13:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:13:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:13:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:13:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:13:56 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:13:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:13:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:13:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:02 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:02 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:02 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:14:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:14:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:14:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:25 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:14:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:14:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:34 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:34 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:14:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:14:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:14:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:14:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:14:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:14:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:14:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:14:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:14:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:14:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:14:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:14:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:14:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:14:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:14:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:14:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:14:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:00 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:15:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:15:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:15:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:15:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:15:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:15:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:15:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:15:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:15:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:15:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=766 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=766 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:36 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:41 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:41 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:15:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:15:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:15:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:15:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:15:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:15:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:15:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:15:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:15:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:15:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:15:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:15:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:16:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:16:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1253 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1253 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1253 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1253 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1253 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:03 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:14 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:20 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:20 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:20 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:20 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:31 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 09:16:31 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 200
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 09:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:33 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 09:16:33 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 0
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:38 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 09:16:38 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 200
2024-10-31 09:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] fake_trx.py:376 (BTS@172.18.201.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-31 09:16:40 [INFO] fake_trx.py:379 (BTS@172.18.201.20:5700) Artificial TRXC delay set to 0
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:16:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:16:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:16:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:16:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:16:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:16:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:16:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:16:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:16:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:16:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:16:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:16:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:57 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:16:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:16:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:16:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:16:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:16:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:16:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:16:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:16:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:16:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:16:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:16:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:07 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:11 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:11 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:11 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:11 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:14 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:14 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:18 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:29 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:32 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:32 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:33 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:33 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 09:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 09:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 09:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 09:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 09:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 09:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:36 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:36 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 09:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 09:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 09:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 09:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 09:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:39 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:39 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 09:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 09:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 09:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:17:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:17:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9590 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:41 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=9591 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:17:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:17:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:17:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:17:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:17:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:17:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:17:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:17:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:47 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:47 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:47 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:17:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:17:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:47 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:17:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:17:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:17:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:17:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:17:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:17:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:17:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:17:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:17:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:17:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:17:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:17:53 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:17:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:53 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:54 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:17:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:17:54 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:17:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:17:55 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:17:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:17:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:17:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:18:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:18:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:18:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:00 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:01 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:02 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:18:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:18:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:18:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:18:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:18:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:18:02 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:18:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:18:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:18:08 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:18:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:08 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:09 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:18:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:18:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:18:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:18:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:18:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:18:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:19 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:18:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:18:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:18:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:18:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:18:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:18:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:18:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:18:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:48 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:50 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:18:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:18:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:18:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:18:52 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:12 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:19:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:19:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:19:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:12 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:19:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:19:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:19:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:19:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:19:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:19:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:19:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:19:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:19:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:19:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:19:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:19:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:19:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:19:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:19:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:19:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:19:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:19:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:19:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:19:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:19:26 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:28 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:19:32 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:19:34 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:19:41 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:19:41 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:19:42 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:19:42 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:19:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:19:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:19:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:19:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:19:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:19:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:19:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:19:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:19:59 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:19:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:59 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:19:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:00 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:00 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:00 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:01 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=430 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:20:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:20:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:09 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:10 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:10 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1007 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:20:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:20:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:18 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:18 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:18 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:20:23 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:20:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:23 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:20:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:27 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:27 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:27 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:31 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:31 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:33 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:20:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:20:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:20:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:39 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:40 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:20:46 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:20:46 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:20:46 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:47 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:20:53 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:20:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:53 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:20:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:20:53 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:20:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:20:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:20:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:20:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:20:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:20:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:20:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:20:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:00 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:00 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:00 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:00 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:00 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:01 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:09 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:21:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:11 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:19 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:21:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:27 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:27 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:28 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:30 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:30 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=995 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:36 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:37 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:21:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:21:38 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:40 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:40 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:21:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:21:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:21:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:21:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:21:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:21:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:21:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:21:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:21:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:21:57 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:21:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:21:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:21:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:21:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:22:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:22:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:22:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:22:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:22:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:12 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:12 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:12 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:13 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:15 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:16 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:17 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:17 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:18 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:18 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:19 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:19 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:20 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:20 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:21 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:22 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:22 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:22:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:24 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3706 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:24 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:22:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:22:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:22:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:22:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:22:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:22:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:22:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:22:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:22:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:22:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:22:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:22:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:22:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:22:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:22:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:22:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:22:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:22:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:22:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:22:56 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:22:57 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:22:58 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:22:59 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:23:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:23:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:23:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:23:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:23:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:23:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:23:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:23:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:23:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=5144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:23:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:23:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:23:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:23:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:23:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:23:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:23:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:23:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:23:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:23:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:23:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:23:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:23:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 09:23:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 09:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 09:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 09:23:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 09:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 09:23:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 09:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 09:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 09:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 09:23:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 09:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 09:23:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:23:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:23:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:23:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:23:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:23:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:23:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:23:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:23:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:23:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:23:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:23:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:23:52 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:23:52 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:23:52 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:23:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:23:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:23:53 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:23:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:23:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:23:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:23:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:23:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:23:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:23:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:23:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:23:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:23:57 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:01 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:24:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:24:05 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:09 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:24:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:24:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3558 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:24:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:24:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:24:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:24:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:24:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:24:14 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:24:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:14 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:24:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:24:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:24:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:24:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:24:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:24:17 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:24:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:24:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:24:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:24:19 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:24:20 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:24:20 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:24:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:24:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:24:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:24:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:24:22 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:24:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:24:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:24:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:24:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:24:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:24:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:24:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:24:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:24:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:24:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:24:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:24:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:24:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:24:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:24:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:24:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:30 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:24:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:24:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:24:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:24:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:24:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:24:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:24:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:24:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:24:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:24:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:24:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:24:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:24:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:24:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:24:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:24:38 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:24:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:24:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:24:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:24:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:24:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:24:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:24:41 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:24:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:24:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:24:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:24:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:24:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:24:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:24:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:24:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:24:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:24:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:24:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:24:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:24:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:24:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:24:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:24:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:24:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:24:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:24:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:24:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:24:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:24:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:24:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:24:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:24:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:24:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:24:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:24:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:24:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:24:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:24:58 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:25:03 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:25:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:05 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:25:05 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:07 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1037 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:07 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1038 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:13 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:13 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:25 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:25:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:25:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:27 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:25:27 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:29 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:29 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1029 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:25:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=592 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:43 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:43 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:43 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:25:43 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:25:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:25:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:25:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:25:56 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:25:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:25:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:25:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:25:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:25:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:25:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:25:57 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:26:09 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:26:10 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:10 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=363 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:16 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:16 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:16 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:26:22 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:26:23 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:23 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:26:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=362 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=362 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=362 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=362 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=362 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=362 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:29 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:31 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:37 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:37 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:37 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:26:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:26:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (TRX1@172.18.201.20:5700/1) RX TRXD message (ver=1 fn=2070 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:46 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:26:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:26:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:26:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:26:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:26:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:26:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:26:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:26:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:26:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:26:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:26:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:26:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (TRX3@172.18.201.20:5700/3) RX TRXD message (ver=1 fn=2072 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2072 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:27:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:27:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:27:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:27:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:27:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:27:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:27:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:27:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:27:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:27:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:27:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:27:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:27:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:27:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:27:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:27:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:27:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:27:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:27:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:27:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:27:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:27:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:27:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD NOHANDOVER
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:27:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:45 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2070 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:27:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:27:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:27:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:27:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:27:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:27:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:27:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:27:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:27:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:27:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:27:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2253 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:28:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:28:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:28:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:28:11 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:28:11 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:28:11 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:28:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:28:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:28:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:28:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:28:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:28:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:28:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:28:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:28:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:28:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:28:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:28:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:28:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:28:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:28:48 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:28:48 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:28:48 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:28:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:28:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:28:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:28:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:28:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:28:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:28:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:28:56 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:29:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:29:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:29:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:29:07 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:29:07 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:29:07 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:29:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:29:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:29:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:29:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:29:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:29:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:29:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:29:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:29:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:29:25 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:29:25 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:29:25 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:29:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:29:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:29:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:29:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:29:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:29:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:29:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:29:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:29:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:29:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:29:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:29:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:29:50 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:29:50 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:29:50 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:29:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:29:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:29:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:29:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:29:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:29:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:29:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:29:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:29:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:29:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:30:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:30:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:30:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:30:09 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:30:09 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:30:09 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:30:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:30:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:30:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:30:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:30:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2267 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2267 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2267 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2267 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2267 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:19 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2268 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:30:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:30:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:30:29 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:30:29 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:30:29 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:30:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:30:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:30:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:30:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:30:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:30:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:30:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:30:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:30:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:30:51 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:30:51 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:30:51 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:30:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:30:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:30:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:30:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:30:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:31:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:11 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4418 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:31:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:31:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:31:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:31:22 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:31:22 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:31:22 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:31:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:31:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:31:32 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:31:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:31:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:31:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:31:42 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:31:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:31:42 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:31:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:31:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:31:54 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2670 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:54 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2670 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:54 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2670 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:54 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2670 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:54 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2670 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:54 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2670 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:31:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:31:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:31:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:32:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:32:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:32:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:32:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:32:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:32:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:32:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:32:05 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:32:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:32:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:32:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:32:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:32:13 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:32:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:32:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:32:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:32:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:32:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:32:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:32:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:32:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:32:24 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:32:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:32:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:32:32 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:32:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:32:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:32:42 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:32:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:32:42 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:32:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:32:42 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:32:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:32:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:32:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:32:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:32:50 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:32:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:32:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:32:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:32:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:33:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:33:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:33:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:33:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:33:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:33:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:33:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:33:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:33:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:33:09 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:09 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:33:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:33:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:33:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:33:20 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:33:20 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:33:20 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:33:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:33:20 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:33:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:33:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:33:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:33:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:33:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:33:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:33:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:33:44 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:33:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:33:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:33:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:33:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:33:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:33:52 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (TRX1@172.18.201.20:5700/1) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:52 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:33:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:33:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:33:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:33:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:34:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:34:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:34:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:34:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:34:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:34:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:34:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:34:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:34:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:34:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:34:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:34:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:34:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:34:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:34:24 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:34:24 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:34:24 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:34:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:34:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:34:24 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:34:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:34:35 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:34:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:34:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:34:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:34:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:34:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:34:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:34:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:34:45 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:34:45 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:34:45 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:34:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:34:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:34:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:34:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:34:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:35:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:35:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:35:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:35:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:35:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:35:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:35:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:18 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2686 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:35:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:35:23 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:35:23 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:35:23 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:35:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:35:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:35:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:35:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:35:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:35:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:35:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=2489 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:35:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:35:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:35:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:35:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:35:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:35:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:35:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:35:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:35:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:35:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:35:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:35:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:35:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:35:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:35:55 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=3335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:36:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:36:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:36:01 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:01 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:36:01 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:36:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:01 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:36:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:36:06 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:36:06 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:06 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:36:06 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:07 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:36:07 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:08 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:08 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=480 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:36:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:36:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:36:13 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:36:13 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:36:14 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:36:19 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:24 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:36:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:34 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:36:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:36:39 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:36:39 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:39 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:36:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:36:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:36:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:36:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:36:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:36:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:49 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:36:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:36:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:36:55 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:00 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4458 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:37:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:37:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:37:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:37:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:37:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:37:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:37:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:37:10 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:15 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:37:20 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:37:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:37:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:37:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:37:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:37:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:37:31 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:37:31 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:31 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:37:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:37:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:37:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:37:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:37:36 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:37:46 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:51 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4451 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4451 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4451 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:51 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=4452 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:37:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:37:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:37:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:37:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:37:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:37:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:37:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:37:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:37:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:37:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:37:57 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:37:57 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:57 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:37:57 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:58 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:37:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:37:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:37:59 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:37:59 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:37:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:37:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:38:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:38:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:38:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:38:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:38:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:38:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:38:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:38:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:38:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:38:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:38:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:38:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:38:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:38:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:38:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:38:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:38:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:38:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:38:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:38:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:38:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 09:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 09:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 09:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 09:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 09:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 09:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 09:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 09:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:38:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:38:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 09:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 09:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 09:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 09:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 09:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 09:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 09:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 09:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 09:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 09:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 09:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 09:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 09:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 09:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 09:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 09:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 09:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 09:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 09:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 09:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 09:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 09:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 09:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 09:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 09:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 09:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 09:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 09:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 09:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 09:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 09:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 09:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 09:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 09:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 09:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 09:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 09:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 09:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 09:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 09:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 09:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:05 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 09:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 09:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 09:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 09:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 09:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 09:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 09:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 09:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 09:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 09:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 09:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 09:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 09:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 09:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 09:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 09:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 09:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 09:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 09:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 09:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 09:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 09:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 09:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 09:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 09:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 09:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 09:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 09:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 09:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 09:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 09:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 09:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 09:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 09:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 09:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 09:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 09:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 09:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 09:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 09:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 09:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:39:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:39:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:39:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=17335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:39:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:39:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:39:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:39:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:39:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:39:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:39:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:39:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:39:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:39:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:39:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:39:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:39:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:39:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:39:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:39:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:39:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:39:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:39:36 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:39:36 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:36 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:37 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:37 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:39:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:39:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:45 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:48 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:48 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:51 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:39:51 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:39:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:39:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:39:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:39:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:39:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:39:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:39:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:39:59 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:39:59 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:39:59 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:39:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:39:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:40:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:40:02 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:06 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:40:09 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:12 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:40:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:40:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:40:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:40:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:40:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:40:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:40:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:40:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:40:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:40:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:40:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:40:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:40:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:40:18 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:40:18 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:18 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:40:18 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:19 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:40:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:40:22 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:25 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:40:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:40:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:25 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1658 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:40:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:40:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:40:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:40:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:40:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:40:30 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:40:30 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:30 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:40:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:40:32 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:40:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:40:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:40:39 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:40:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:40:59 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:40:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:40:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:40:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:41:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:41:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:41:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:41:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:41:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:41:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:41:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:41:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:41:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:41:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:41:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:41:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:41:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:41:05 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:06 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:41:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:41:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:28 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:41:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:41:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:41:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:41:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:41:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:41:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:41:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:41:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:41:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:41:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:41:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:41:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:41:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:41:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:41:34 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:41:34 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:41:34 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:41:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:41:36 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:41:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:39 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:41:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:41:42 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:02 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:42:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:42:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:42:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:42:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:42:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:42:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:42:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:42:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:42:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:42:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:42:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:42:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:42:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:42:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:42:08 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:42:08 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:42:08 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:42:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:42:08 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:09 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:42:09 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:42:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:42:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:42:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:42:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:42:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:42:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:42:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:42:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:42:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:42:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:42:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:42:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:42:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:42:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:42:48 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 09:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 09:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 09:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 09:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 09:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 09:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 09:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 09:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 09:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 09:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 09:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 09:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 09:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 09:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 09:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 09:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 09:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 09:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 09:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 09:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 09:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 09:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 09:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 09:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 09:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-31 09:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-31 09:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-31 09:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-31 09:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-31 09:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-31 09:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-31 09:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-31 09:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-31 09:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-31 09:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-31 09:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-31 09:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-31 09:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-31 09:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-31 09:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-31 09:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-31 09:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-31 09:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-31 09:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-31 09:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-31 09:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-31 09:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-31 09:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-31 09:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-31 09:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-31 09:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-31 09:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-31 09:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-31 09:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-31 09:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-31 09:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-31 09:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-31 09:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-31 09:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-31 09:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-31 09:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-31 09:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-31 09:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-31 09:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:43:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:43:22 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:43:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:43:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:43:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-31 09:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-31 09:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-31 09:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-31 09:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-31 09:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-31 09:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-31 09:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-31 09:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-31 09:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-31 09:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-31 09:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-31 09:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-31 09:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-31 09:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-31 09:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-31 09:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-31 09:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-31 09:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-31 09:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-31 09:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-31 09:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-31 09:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-31 09:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-31 09:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-31 09:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-31 09:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-31 09:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-31 09:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-31 09:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-31 09:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-31 09:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-31 09:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-31 09:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-31 09:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-31 09:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-31 09:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-31 09:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-31 09:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-31 09:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-31 09:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-31 09:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-31 09:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-31 09:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-31 09:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-31 09:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-31 09:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-31 09:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-31 09:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-31 09:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-31 09:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-31 09:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-31 09:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-31 09:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-31 09:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-31 09:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-31 09:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-31 09:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-31 09:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-31 09:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-31 09:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-31 09:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-31 09:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-31 09:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-31 09:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-31 09:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-31 09:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-31 09:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-31 09:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-31 09:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-31 09:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-31 09:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-31 09:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-31 09:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:43:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:43:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:43:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:43:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:43:57 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-31 09:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-31 09:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-31 09:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-31 09:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-31 09:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-31 09:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-31 09:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-31 09:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-31 09:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-31 09:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-31 09:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-31 09:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-31 09:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-31 09:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-31 09:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-31 09:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-31 09:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-31 09:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-31 09:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-31 09:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-31 09:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-31 09:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-31 09:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-31 09:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-31 09:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-31 09:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-31 09:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-31 09:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-31 09:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-31 09:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-31 09:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-31 09:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-31 09:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-31 09:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-31 09:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 25704
2024-10-31 09:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 25806
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:15 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:44:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:44:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:44:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:44:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:44:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:44:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:44:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:44:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:44:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:44:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:44:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:44:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:44:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:44:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:44:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:44:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:44:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:44:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:44:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:44:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:44:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:44:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:44:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:44:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:44:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:44:27 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:44:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:30 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:44:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:44:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:44:33 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:44:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:44:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:44:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:44:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:44:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:44:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:44:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:44:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:44:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:44:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:44:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:44:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:44:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:44:40 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:44:40 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:40 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:44:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:44:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:44:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:44:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:44:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:44:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:44:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:44:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:44:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:44:55 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:10 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:45:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 09:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 09:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 09:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 09:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 09:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 09:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 09:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 09:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 09:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 09:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 09:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 09:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 09:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 09:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 09:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 09:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 09:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:45:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:45:25 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 09:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 09:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 09:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 09:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 09:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 09:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:28 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:45:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:45:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:28 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:45:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:45:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:45:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:45:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:45:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:45:33 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:45:33 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:45:33 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:45:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:45:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:45:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:45:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:45:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:45:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:45:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:45:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:45:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:45:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:45:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:45:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:45:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:45:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:45:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:45:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:45:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:45:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:45:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:45:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:45:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:45:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:45:44 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:54 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:45:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:46:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-31 09:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-31 09:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-31 09:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-31 09:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-31 09:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-31 09:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-31 09:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-31 09:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-31 09:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-31 09:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-31 09:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-31 09:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-31 09:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-31 09:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-31 09:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-31 09:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-31 09:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-31 09:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-31 09:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-31 09:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-31 09:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-31 09:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-31 09:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-31 09:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-31 09:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-31 09:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-31 09:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-31 09:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-31 09:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-31 09:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-31 09:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-31 09:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-31 09:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-31 09:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-31 09:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-31 09:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-31 09:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-31 09:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:46:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:46:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=10316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:46:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:46:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:46:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:46:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:46:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:46:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:46:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:46:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:46:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:46:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:46:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:46:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:46:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:46:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:46:27 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:28 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:46:28 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:46:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:46:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:46:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:33 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:46:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:46:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:46:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1378 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1378 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1378 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1378 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1378 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:33 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=1378 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:46:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:46:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:46:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:46:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:46:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:46:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:46:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:46:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:46:41 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:45 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:46:49 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:53 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:46:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:46:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:46:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:46:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:46:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:46:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:46:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:46:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:46:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:46:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:46:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:46:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:46:59 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:00 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:47:01 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:21 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:47:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:47:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:47:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:47:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:47:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:47:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:47:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:47:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:47:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:47:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:47:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:47:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:47:29 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:34 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:47:41 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:41 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:47:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:47:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:47:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:47:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:47:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:47:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:47:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:47:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:47:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:47:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:47:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:47:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:47:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:47:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:47:47 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:47 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:47:47 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:47:49 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:47:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:47:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:47:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:47:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:47:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:52 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:47:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:47:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.201.22:6700) Recv SETFH cmd
2024-10-31 09:47:56 [INFO] transceiver.py:201 (MS@172.18.201.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-31 09:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-31 09:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-31 09:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-31 09:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-31 09:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-31 09:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-31 09:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-31 09:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-31 09:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-31 09:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-31 09:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-31 09:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-31 09:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-31 09:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-31 09:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-31 09:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-31 09:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-31 09:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-31 09:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-31 09:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-31 09:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-31 09:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-31 09:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-31 09:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-31 09:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-31 09:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-31 09:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-31 09:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:48:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:48:16 [INFO] transceiver.py:205 (MS@172.18.201.22:6700) Frequency hopping disabled
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6341 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6341 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6341 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:16 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=6342 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:48:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:48:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:48:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:48:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:48:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:48:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:23 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:48:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:48:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:48:28 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:48:28 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:48:28 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:48:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:48:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:48:35 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:48:35 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:48:35 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:37 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:48:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:48:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:48:42 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:42 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:48:42 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:48:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:48:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:48:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:48:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:48:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:50 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:48:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:48:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:48:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:48:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:48:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:48:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:48:56 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:48:56 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:48:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:48:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:48:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:03 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:03 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:10 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:10 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:10 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:15 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:15 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:21 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:21 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:21 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:27 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:27 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:27 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:27 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:38 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:38 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:38 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:44 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:44 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:49 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:49 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:49 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:49:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:49:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:49:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:53 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:49:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:49:58 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:49:58 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:49:58 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:49:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:49:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:49:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:49:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:49:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:49:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:50:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:50:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:50:05 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:50:05 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:50:05 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-31 09:50:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-31 09:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-31 09:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-31 09:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-31 09:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-31 09:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-31 09:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-31 09:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-31 09:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-31 09:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-31 09:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-31 09:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-31 09:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-31 09:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-31 09:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-31 09:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-31 09:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-31 09:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-31 09:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-31 09:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-31 09:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-31 09:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-31 09:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-31 09:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-31 09:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-31 09:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-31 09:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:50:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:50:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:50:26 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:50:26 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:50:26 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:26 [WARNING] transceiver.py:250 (BTS@172.18.201.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:50:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:50:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-31 09:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-31 09:50:32 [DEBUG] fake_trx.py:272 (BTS@172.18.201.20:5700) Recv FAKE_TOA cmd
2024-10-31 09:50:32 [DEBUG] fake_trx.py:291 (BTS@172.18.201.20:5700) Recv FAKE_RSSI cmd
2024-10-31 09:50:32 [DEBUG] fake_trx.py:316 (BTS@172.18.201.20:5700) Recv FAKE_CI cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD HANDOVER
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-31 09:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-31 09:50:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD ECHO
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.201.22:6700) Ignore CMD SETSLOT
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.201.22:6700) Recv RXTUNE cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.201.22:6700) Recv TXTUNE cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.201.22:6700) Recv POWERON CMD
2024-10-31 09:50:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.201.22:6700) Starting transceiver...
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD NOHANDOVER
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.201.22:6700) Recv POWEROFF cmd
2024-10-31 09:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.201.22:6700) Stopping transceiver...
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.201.20:5700) Recv SETPOWER cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.201.20:5700/1) Recv SETPOWER cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.201.20:5700/2) Recv SETPOWER cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.201.20:5700/3) Recv SETPOWER cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-31 09:50:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.201.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.201.20:5700) Recv SETFORMAT cmd
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.201.20:5700) TRXD header version 1 -> 1
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.201.20:5700/1) Recv RXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.201.20:5700/1) Recv TXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.201.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.201.20:5700/1) Recv NOMTXPOWER cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.201.20:5700/1) Recv SETFORMAT cmd
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.201.20:5700/1) TRXD header version 1 -> 1
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.201.20:5700/2) Recv RXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.201.20:5700/2) Recv TXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.201.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.201.20:5700/2) Recv NOMTXPOWER cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.201.20:5700/2) Recv SETFORMAT cmd
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.201.20:5700/2) TRXD header version 1 -> 1
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.201.20:5700/3) Recv RXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.201.20:5700/3) Recv TXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.201.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.201.20:5700/3) Recv NOMTXPOWER cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.201.20:5700/3) Recv SETFORMAT cmd
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.201.20:5700/3) TRXD header version 1 -> 1
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.201.20:5700) Recv RXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETTSC
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETTSC
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETTSC
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.201.20:5700) Recv TXTUNE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETRXGAIN
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETRXGAIN
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETTSC
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETRXGAIN
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.201.20:5700) Recv NOMTXPOWER cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.201.20:5700) Recv POWERON CMD
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.201.20:5700) Starting transceiver...
2024-10-31 09:50:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETRXGAIN
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.201.20:5700/1) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.201.20:5700/1) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.201.20:5700/2) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.201.20:5700/2) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.201.20:5700) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.201.20:5700/3) Ignore CMD SETSLOT
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.201.20:5700) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.201.20:5700/3) Recv RFMUTE cmd
2024-10-31 09:50:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.201.20:5700) Recv POWEROFF cmd
2024-10-31 09:50:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.201.20:5700) Stopping transceiver...
2024-10-31 09:50:39 [INFO] transceiver.py:239 Stopping clock generator